DSPIC30F6015-30I/PT Microchip Technology, DSPIC30F6015-30I/PT Datasheet - Page 56
DSPIC30F6015-30I/PT
Manufacturer Part Number
DSPIC30F6015-30I/PT
Description
IC DSPIC MCU/DSP 144K 64TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.DSPIC30F2011-20ISO.pdf
(66 pages)
2.DSPIC30F6015-30IPT.pdf
(232 pages)
3.DSPIC30F6015-30IPT.pdf
(14 pages)
4.DSPIC30F6015-30IPT.pdf
(12 pages)
5.DSPIC30F6015-30IPT.pdf
(18 pages)
Specifications of DSPIC30F6015-30I/PT
Core Processor
dsPIC
Core Size
16-Bit
Speed
30 MIPs
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
52
Program Memory Size
144KB (48K x 24)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Core Frequency
40MHz
Core Supply Voltage
5.5V
Embedded Interface Type
CAN, I2C, SPI, UART
No. Of I/o's
52
Flash Memory Size
144KB
Supply Voltage Range
2.5V To 5.5V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164315 - MODULE SKT MPLAB PM3 44TQFPAC30F008 - MODULE SKT FOR DSPIC30F 64TQFPDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
DSPIC30F601530IPT
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC30F6015-30I/PT
Manufacturer:
SICK
Quantity:
1 000
Company:
Part Number:
DSPIC30F6015-30I/PT
Manufacturer:
Microchip Technology
Quantity:
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Part Number:
DSPIC30F6015-30I/PT
Manufacturer:
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Quantity:
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- DSPIC30F2011-20ISO PDF datasheet
- DSPIC30F6015-30IPT PDF datasheet #2
- DSPIC30F6015-30IPT PDF datasheet #3
- DSPIC30F6015-30IPT PDF datasheet #4
- DSPIC30F6015-30IPT PDF datasheet #5
- Current page: 56 of 232
- Download datasheet (4Mb)
dsPIC30F6010A/6015
7.2
7.2.1
In order to erase a block of data EEPROM, the
NVMADRU and NVMADR registers must initially
point to the block of memory to be erased. Configure
NVMCON for erasing a block of data EEPROM and
set the WR and WREN bits in the NVMCON register.
Setting the WR bit initiates the erase, as shown in
Example 7-2.
EXAMPLE 7-2:
7.2.2
The NVMADRU and NVMADR registers must point to
the block. Select a block of data Flash and set the WR
and WREN bits in the NVMCON register. Setting the
WR bit initiates the erase, as shown in Example 7-3.
EXAMPLE 7-3:
DS70150D-page 56
; Select data EEPROM block, WR, WREN bits
; Start erase cycle by setting WR after writing key sequence
; Erase cycle will complete in 2mS. CPU is not stalled for the Data Erase Cycle
; User can poll WR bit, use NVMIF or Timer IRQ to determine erasure complete
; Select data EEPROM word, WR, WREN bits
; Start erase cycle by setting WR after writing key sequence
; Erase cycle will complete in 2mS. CPU is not stalled for the Data Erase Cycle
; User can poll WR bit, use NVMIF or Timer IRQ to determine erasure complete
MOV
MOV
DISI
MOV
MOV
MOV
MOV
BSET
NOP
NOP
MOV
MOV
DISI
MOV
MOV
MOV
MOV
BSET
NOP
NOP
Erasing Data EEPROM
ERASING A BLOCK OF DATA
EEPROM
ERASING A WORD OF DATA
EEPROM
#4045,W0
W0
#5
#0x55,W0
W0
#0xAA,W1
W1
NVMCON,#WR
#4044,W0
W0
#5
#0x55,W0
W0
#0xAA,W1
W1
NVMCON,#WR
,
,
,
,
,
,
NVMCON
NVMKEY
NVMKEY
NVMCON
NVMKEY
NVMKEY
DATA EEPROM BLOCK ERASE
DATA EEPROM WORD ERASE
;
; Write the 0x55 key
;
; Write the 0xAA key
; Initiate erase sequence
; Initialize NVMCON SFR
; Block all interrupts with priority <7
; for next 5 instructions
;
; Write the 0x55 key
;
; Write the 0xAA key
; Initiate erase sequence
; Block all interrupts with priority <7
; for next 5 instructions
© 2008 Microchip Technology Inc.
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