PIC16LC65A-04I/L Microchip Technology, PIC16LC65A-04I/L Datasheet - Page 49
PIC16LC65A-04I/L
Manufacturer Part Number
PIC16LC65A-04I/L
Description
IC MCU OTP 4KX14 PWM 44PLCC
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Specifications of PIC16LC65A-04I/L
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
7KB (4K x 14)
Program Memory Type
OTP
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Package
44PLCC
Device Core
PIC
Family Name
PIC16
Maximum Speed
4 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
33
Interface Type
I2C/SPI/USART
Number Of Timers
3
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
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Quantity
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Part Number:
PIC16LC65A-04I/L
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9.0
Each Capture/Compare/PWM (CCP) module contains
a 16-bit register which can operate as a:
• 16-bit Capture register
• 16-bit Compare register
• PWM Master/Slave Duty Cycle register
Both the CCP1 and CCP2 modules are identical in
operation, with the exception being the operation of the
special event trigger. Table 9-1 and Table 9-2 show the
resources and interactions of the CCP module(s). In
the following sections, the operation of a CCP module
is described with respect to CCP1. CCP2 operates the
same as CCP1, except where noted.
CCP1 Module:
Capture/Compare/PWM Register1 (CCPR1) is com-
prised of two 8-bit registers: CCPR1L (low byte) and
CCPR1H (high byte). The CCP1CON register controls
the operation of CCP1. The special event trigger is
generated by a compare match and will reset Timer1.
TABLE 9-2:
CCPx Mode CCPy Mode
Capture
Capture
Compare
PWM
PWM
PWM
2000 Microchip Technology Inc.
CAPTURE/COMPARE/PWM
MODULES
Capture
Compare
Compare
PWM
Capture
Compare
INTERACTION OF TWO CCP MODULES
Same TMR1 time-base.
The compare should be configured for the special event trigger, which clears TMR1.
The compare(s) should be configured for the special event trigger, which clears TMR1.
The PWMs will have the same frequency and update rate (TMR2 interrupt).
None.
None.
PIC16C63A/65B/73B/74B
CCP2 Module:
Capture/Compare/PWM Register2 (CCPR2) is com-
prised of two 8-bit registers: CCPR2L (low byte) and
CCPR2H (high byte). The CCP2CON register controls
the operation of CCP2. The special event trigger is
generated by a compare match and will reset Timer1
and start an A/D conversion (if the A/D module is
enabled).
Additional information on CCP modules is available in
the PICmicro™ Mid-Range MCU Family Reference
Manual (DS33023) and in “Using the CCP Modules”
(AN594).
TABLE 9-1:
Interaction
CCP Mode
Compare
Capture
PWM
CCP MODE - TIMER
RESOURCES REQUIRED
Timer Resource
DS30605C-page 49
Timer1
Timer1
Timer2
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