DSPIC30F6010A-30I/PF Microchip Technology, DSPIC30F6010A-30I/PF Datasheet - Page 14

• Manufacturer Part Number: DSPIC30F6010A-30I/PF
• Description: IC DSPIC MCU/DSP 144K 80TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F6010A-30I/PF

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 30 MIPs
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 144KB (48K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TQFP, 80-VQFP
• Core Frequency: 40MHz
• Core Supply Voltage: 5.5V
• Embedded Interface Type: CAN, I2C, SPI, UART
• No. Of I/o's: 68
• Flash Memory Size: 144KB
• Supply Voltage Range: 4.5V To 5.5V
• Package: 80TQFP
• Device Core: dsPIC
• Family Name: dsPIC30
• Maximum Speed: 30 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 68
• Interface Type: CAN/I2C/SPI/UART
• On-chip Adc: 16-chx10-bit
• Number Of Timers: 5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM300019 - BOARD DEMO DSPICDEM 80L STARTERAC164314 - MODULE SKT FOR PM3 80PFDM300020 - BOARD DEV DSPICDEM MC1 MOTORCTRLAC30F001 - MODULE SOCKET DSPIC30F 80TQFPXLT80PT2 - SOCKET TRANSITION ICE 80TQFPDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

dsPIC30F Family Reference Manual
Figure 35-5:
DS70272B-page 35-14
Note 1: Operation for 8-bit mode is shown; the 16-bit mode is similar.
SS1
SCK1
(CKP = 0
CKE = 0)
SCK1
(CKP = 1
CKE = 0)
SPITBF
SDO1
SDI1
(SMP = 0)
Input
Sample
(SMP = 0)
SPI1IF
SPIRBF
(2)
2: When the SSEN (SPI1CON1<7>) bit is set to ‘1’, the SS1 pin must be driven low to enable transmission and
3: Transmit data is held in SPI1TXB and SPITBF remains set until all bits are transmitted.
(3)
User application
writes to SPI1BUF
reception in Slave mode.
SPI1 Slave Mode Timing (Slave Select Pin Enabled)
SPI1BUF
to
SPI1SR
bit 7
bit 7
bit 6
bit 5
bit 4
bit 3
(1)
bit 2
SPI1SR to
SPI1BUF
bit 1
© 2008 Microchip Technology Inc.
User application
reads SPI1BUF
bit 0
bit 0
1 instruction
cycle latency