LPC2138FBD64/01,15 NXP Semiconductors, LPC2138FBD64/01,15 Datasheet
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LPC2138FBD64/01,15
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LPC2138FBD64/01-S
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LPC2138FBD64/01,15 Summary of contents
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LPC2131/32/34/36/38 Single-chip 16/32-bit microcontrollers; 32/64/128/256/512 kB ISP/IAP flash with 10-bit ADC and DAC Rev. 5 — 2 February 2011 1. General description The LPC2131/32/34/36/38 microcontrollers are based on a 16/32-bit ARM7TDMI-S CPU with real-time emulation and embedded trace support, that ...
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... NXP Semiconductors One (LPC2131/32) or two (LPC2134/36/38) 8-channel 10-bit ADCs provide a total analog inputs, with conversion times as low as 2.44 μs per channel. Single 10-bit DAC provides variable analog output (LPC2132/34/36/38). Two 32-bit timers/external event counters (with four capture and four compare channels each), PWM unit (six outputs) and watchdog. ...
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... NXP Semiconductors Table 1. Type number LPC2136FBD64 LPC2136FBD64/01 LQFP64 LPC2138FBD64 LPC2138FBD64/01 LQFP64 LPC2138FHN64 LPC2138FHN64/01 HVQFN64 plastic thermal enhanced very thin quad flat 3.1 Ordering options Table 2. Type number LPC2131FBD64 LPC2131FBD64/01 LPC2132FBD64 LPC2132FBD64/01 LPC2132FHN64 LPC2132FHN64/01 LPC2134FBD64 LPC2134FBD64/01 LPC2136FBD64 LPC2136FBD64/01 LPC2138FBD64 LPC2138FBD64/01 LPC2138FHN64 LPC2138FHN64/01 ...
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... NXP Semiconductors 4. Block diagram LPC2131, LPC2131/01 LPC2132, LPC2132/01 LPC2134, LPC2134/01 LPC2136, LPC2136/01 LPC2138, LPC2138/01 P0[31:0] FAST GENERAL PURPOSE I/O P1[31:16] ARM7 local bus INTERNAL SRAM CONTROLLER 8/16/32 kB SRAM EXTERNAL EINT[3:0] INTERRUPTS 8 × CAP CAPTURE/ COMPARE TIMER 0/TIMER 1 8 × MAT AD0[7:0] ...
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... NXP Semiconductors 5. Pinning information 5.1 Pinning P0.21/PWM5/CAP1 P0.22/CAP0.0/MAT0.0 RTCX1 3 P1.19/TRACEPKT3 4 RTCX2 DDA P1.18/TRACEPKT2 8 P0.25/AD0.4 9 P0.26/AD0.5 10 P0.27/AD0.0/CAP0.1/MAT0 P1.17/TRACEPKT1 13 P0.28/AD0.1/CAP0.2/MAT0.2 P0.29/AD0.2/CAP0.3/MAT0.3 14 P0.30/AD0.3/EINT3/CAP0.0 15 P1.16/TRACEPKT0 16 Fig 2. LPC2131 LQFP64 pinning LPC2131_32_34_36_38 Product data sheet LPC2131/32/34/36/38 LPC2131 LPC2131/01 All information provided in this document is subject to legal disclaimers. Rev. 5 — 2 February 2011 ...
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... NXP Semiconductors P0.21/PWM5/CAP1.3 1 P0.22/CAP0.0/MAT0.0 2 RTCX1 3 P1.19/TRACEPKT3 4 5 RTCX2 DDA P1.18/TRACEPKT2 8 P0.25/AD0.4/AOUT 9 10 P0.26/AD0.5 P0.27/AD0.0/CAP0.1/MAT0.1 11 P1.17/TRACEPKT1 12 P0.28/AD0.1/CAP0.2/MAT0.2 13 P0.29/AD0.2/CAP0.3/MAT0 P0.30/AD0.3/EINT3/CAP0.0 16 P1.16/TRACEPKT0 Fig 3. LPC2132 LQFP64 pin configuration LPC2131_32_34_36_38 Product data sheet LPC2131/32/34/36/38 LPC2132 LPC2132/01 All information provided in this document is subject to legal disclaimers. Rev. 5 — 2 February 2011 ...
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... NXP Semiconductors P0.21/PWM5/AD1.6/CAP1.3 1 P0.22/AD1.7/CAP0.0/MAT0.0 2 RTCX1 3 P1.19/TRACEPKT3 4 5 RTCX2 DDA P1.18/TRACEPKT2 8 P0.25/AD0.4/AOUT 9 10 P0.26/AD0.5 P0.27/AD0.0/CAP0.1/MAT0.1 11 P1.17/TRACEPKT1 12 P0.28/AD0.1/CAP0.2/MAT0.2 13 P0.29/AD0.2/CAP0.3/MAT0 P0.30/AD0.3/EINT3/CAP0.0 16 P1.16/TRACEPKT0 Fig 4. LPC2134/36/38 LQFP64 pin configuration LPC2131_32_34_36_38 Product data sheet LPC2131/32/34/36/38 LPC2134, LPC2134/01 LPC2136, LPC2136/01 LPC2138, LPC2138/01 All information provided in this document is subject to legal disclaimers. ...
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... NXP Semiconductors terminal 1 index area P0.21/PWM5/AD1.6/CAP1.3 P0.22/AD1.7/CAP0.0/MAT0.0 RTCX1 P1.19/TRACEPKT3 RTCX2 DDA P1.18/TRACEPKT2 P0.25/AD0.4/AOUT P0.26/AD0.5 P0.27/AD0.0/CAP0.1/MAT0.1 P1.17/TRACEPKT1 P0.28/AD0.1/CAP0.2/MAT0.2 P0.29/AD0.2/CAP0.3/MAT0.3 P0.30/AD0.3/EINT3/CAP0.0 P1.16/TRACEPKT0 AD1.7 to AD1.0 only available on LPC2134/36/38. Fig 5. LPC2132/38 HVQFN64 pin configuration LPC2131_32_34_36_38 Product data sheet LPC2132/2138 Transparent top view All information provided in this document is subject to legal disclaimers. ...
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... NXP Semiconductors 5.2 Pin description Table 3. Pin description Symbol Pin Type P0.0 to P0.31 I/O [1] P0.0/TXD0 PWM1 O [2] P0.1/RXD0 PWM3/EINT0 O I [3] P0.2/SCL0/ 22 I/O CAP0.0 I [3] P0.3/SDA0/ 26 I/O MAT0.0/EINT1 O I [4] P0.4/SCK0/ 27 I/O CAP0.1/AD0 [4] P0.5/MISO0/ 29 I/O MAT0.1/AD0 [4] P0.6/MOSI0/ 30 I/O CAP0.2/AD1 [2] P0.7/SSEL0 PWM2/EINT2 O I [4] P0.8/TXD1/ ...
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... NXP Semiconductors Table 3. Pin description …continued Symbol Pin Type [3] P0.11/CTS1 CAP1.1/SCL1 I I/O [4] P0.12/DSR1 MAT1.0/AD1 [4] P0.13/DTR1 MAT1.1/AD1 [3] P0.14/DCD1 EINT1/SDA1 I I/O [4] P0.15/RI1 EINT2/AD1 [2] P0.16/EINT0 MAT0.2/CAP0 [1] P0.17/CAP1. SCK1/MAT1.2 I/O O [1] P0.18/CAP1. MISO1/MAT1.3 I/O O [1] P0.19/MAT1. MOSI1/CAP1.2 I/O I [2] P0.20/MAT1. SSEL1/EINT3 I I [4] P0.21/PWM5 AD1.6/CAP1 [4] P0.22/AD1.7/ ...
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... NXP Semiconductors Table 3. Pin description …continued Symbol Pin Type [1] P0.23 58 I/O [5] P0.25/AD0. AOUT O [4] P0.26/AD0 [4] P0.27/AD0. CAP0.1/MAT0 [4] P0.28/AD0. CAP0.2/MAT0 [4] P0.29/AD0. CAP0.3/MAT0 [4] P0.30/AD0. EINT3/CAP0 [6] P0. P1.0 to P1.31 I/O [6] P1.16 TRACEPKT0 [6] P1.17 TRACEPKT1 [6] P1.18 TRACEPKT2 [6] P1.19 TRACEPKT3 [6] P1.20 TRACESYNC [6] P1.21 PIPESTAT0 [6] P1.22 PIPESTAT1 [6] P1 ...
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... NXP Semiconductors Table 3. Pin description …continued Symbol Pin Type [6] P1.26/RTCK 24 I/O [6] P1.27/TDO 64 O [6] P1.28/TDI 60 I [6] P1.29/TCK 56 I [6] P1.30/TMS 52 I [6] P1.31/TRST 20 I [7] RESET 57 I [8] XTAL1 62 I [8] XTAL2 61 O [9] RTCX1 3 I [9] RTCX2 18 25, 42 SSA V 23, 43 DDA VREF 63 I VBAT tolerant pad providing digital I/O functions with TTL levels and hysteresis and 10 ns slew rate control. ...
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... NXP Semiconductors 6. Functional description 6.1 Architectural overview The ARM7TDMI general purpose 32-bit microprocessor, which offers high performance and very low power consumption. The ARM architecture is based on Reduced Instruction Set Computer (RISC) principles, and the instruction set and related decode mechanism are much simpler than those of microprogrammed Complex Instruction Set Computers ...
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... NXP Semiconductors 6.4 Memory map The LPC2131/32/34/36/38 memory map incorporates several distinct regions, as shown in Figure In addition, the CPU interrupt vectors may be re-mapped to allow them to reside in either flash memory (the default) or on-chip static RAM. This is described in “System Fig 6. LPC2131/32/34/36/38 memory map LPC2131_32_34_36_38 Product data sheet 6 ...
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... NXP Semiconductors 6.5 Interrupt controller The Vectored Interrupt Controller (VIC) accepts all of the interrupt request inputs and categorizes them as Fast Interrupt Request (FIQ), vectored Interrupt Request (IRQ), and non-vectored IRQ as defined by programmable settings. The programmable assignment scheme means that priorities of interrupts from the various peripherals can be dynamically assigned and adjusted ...
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... NXP Semiconductors Table 4. Block UART1 PWM0 SPI0 SSP PLL RTC System Control AD0 I2C1 BOD AD1 6.6 Pin connect block The pin connect block allows selected pins of the microcontroller to have more than one function. Configuration registers control the multiplexers to allow connection between the pin and the on chip peripherals ...
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... NXP Semiconductors 6.7.2 Fast I/O features available in LPC213x/01 only • Fast I/O registers are located on the ARM local bus for the fastest possible I/O timing. • All GPIO registers are byte addressable. • Entire port value can be written in one instruction. • ...
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... NXP Semiconductors • Built-in baud rate generator. • Standard modem interface signals included on UART1. (LPC2134/36/38 only) • The LPC2131/32/34/36/38 transmission FIFO control enables implementation of software (XON/XOFF) flow control on both UARTs and hardware (CTS/RTS) flow control on the LPC2134/36/38 UART1 only. 6.10.2 UART features available in LPC213x/01 only • ...
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... NXP Semiconductors 6.12.1 Features • Compliant with Serial Peripheral Interface (SPI) specification. • Synchronous, Serial, Full Duplex, Communication. • Combined SPI master and slave. • Maximum data bit rate of one eighth of the input clock rate. 6.13 SSP serial I/O controller The LPC2131/32/34/36/38 each contain one Serial Synchronous Port controller (SSP). ...
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... NXP Semiconductors – Stop timer on match with optional interrupt generation. – Reset timer on match with optional interrupt generation. • Four external outputs per timer/counter corresponding to match registers, with the following capabilities: – Set LOW on match. – Set HIGH on match. – Toggle on match. ...
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... NXP Semiconductors 6.17 Pulse width modulator The PWM is based on the standard Timer block and inherits all of its features, although only the PWM function is pinned out on the LPC2131/32/34/36/38. The Timer is designed to count cycles of the peripheral clock (PCLK) and optionally generate interrupts or perform other actions when specified timer values occur, based on seven match registers. ...
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... NXP Semiconductors • Match register updates are synchronized with pulse outputs to prevent generation of erroneous pulses. Software must ‘release’ new match values before they can become effective. • May be used as a standard timer if the PWM mode is not enabled. • A 32-bit Timer/Counter with a programmable 32-bit Prescaler. ...
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... NXP Semiconductors The wake-up timer monitors the crystal oscillator as the means of checking whether it is safe to begin code execution. When power is applied to the chip, or some event caused the chip to exit Power-down mode, some time is required for the oscillator to produce a signal of sufficient amplitude to drive the clock logic. The amount of time depends on ...
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... NXP Semiconductors 6.18.8 Power Control The LPC2131/32/34/36/38 support two reduced power modes: Idle mode and Power-down mode. In Idle mode, execution of instructions is suspended until either a reset or interrupt occurs. Peripheral functions continue operation during Idle mode and may generate interrupts to cause the processor to resume execution. Idle mode eliminates power used by the processor itself, memory systems and related controllers, and internal buses ...
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... NXP Semiconductors The ARM core has a Debug Communication Channel function built-in. The debug communication channel allows a program running on the target to communicate with the host debugger or another separate host without stopping the program flow or even entering the debug state. The debug communication channel is accessed as a co-processor 14 by the program running on the ARM7TDMI-S core ...
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... NXP Semiconductors 7. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter V supply voltage (core and external rail analog 3.3 V pad supply voltage DDA V input voltage on pin VBAT i(VBAT) V input voltage on pin VREF i(VREF) V analog input voltage ...
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... NXP Semiconductors 8. Static characteristics Table 6. Static characteristics − ° ° +85 C for commercial applications, unless otherwise specified. amb Symbol Parameter V supply voltage (core and DD external rail) V analog 3.3 V pad supply DDA voltage V input voltage on pin VBAT i(VBAT) V input voltage on pin VREF ...
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... NXP Semiconductors Table 6. Static characteristics − ° ° +85 C for commercial applications, unless otherwise specified. amb Symbol Parameter I Power-down mode battery BATpd supply current I active mode battery BATact supply current I optimized active mode BATact(opt) battery supply current 2 I C-bus pins V HIGH-level input voltage ...
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... NXP Semiconductors [4] V supply voltages must be present. DD [5] 3-state outputs go into 3-state mode when V [6] Please also see the errata note mentioned in the errata sheet. [7] Accounts for 100 mV voltage drop in all supply lines. [8] Only allowed for a short time period. [9] Minimum condition for ...
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... NXP Semiconductors 9.1 Timing Fig 7. External clock timing (with an amplitude of at least V 9.2 LPC2138 power consumption measurements 40 I (mA Test conditions: code executed from flash; all peripherals are enabled in PCONP register; PCLK = CCLK/ −60 °C (max 140 ° ° °C (typical °C (typical) ...
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... NXP Semiconductors 15 I (mA Test conditions: Idle mode entered executing code from flash; all peripherals are enabled in PCONP register; PCLK = CCLK/ 140 °C (max −60 ° ° °C (typical °C (typical) ( Fig 9. I idle measured at different frequencies (CCLK) and temperatures DD 500 I (μA) ...
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... NXP Semiconductors 10. ADC electrical characteristics Table 8. ADC static characteristics = −40 °C to +85 °C unless otherwise specified; ADC frequency 4.5 MHz 2 3 DDA amb Symbol Parameter V analog input voltage IA C analog input capacitance ia E differential linearity error D E integral non-linearity L(adj) E offset error ...
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... NXP Semiconductors 1023 1022 1021 1020 1019 1018 7 code out offset error E O (1) Example of an actual transfer curve. (2) The ideal transfer curve. (3) Differential linearity error (E (4) Integral non-linearity (E L(adj) (5) Center of a step of the actual transfer curve. Fig 11. ADC characteristics LPC2131_32_34_36_38 Product data sheet ...
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... NXP Semiconductors Fig 12. Suggested ADC interface - LPC2131/32/34/36/38 ADx.y pin LPC2131_32_34_36_38 Product data sheet LPC2131/32/34/36/38 LPC2131/32/34/36/38 20 kΩ ADx.y SAMPLE All information provided in this document is subject to legal disclaimers. Rev. 5 — 2 February 2011 Single-chip 16/32-bit microcontrollers R vsi ADx EXT 002aad452 © NXP B.V. 2011. All rights reserved. ...
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... NXP Semiconductors 11. DAC electrical characteristics Table 9. DAC electrical characteristics = −40 °C to +85 °C unless otherwise specified DDA amb Symbol Parameter E differential linearity error D E integral non-linearity L(adj) E offset error O E gain error G C load capacitance L R load resistance L LPC2131_32_34_36_38 Product data sheet ...
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... NXP Semiconductors 12. Application information 12.1 Crystal oscillator XTAL input and component selection The input voltage to the on-chip oscillators is limited to 1 the oscillator is driven by a clock in slave mode recommended that the input be coupled through a capacitor with C = 100 pF. To limit the input voltage to the specified range, choose an additional ...
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... NXP Semiconductors Fig 14. Oscillator modes and models: oscillation mode of operation and external crystal Table 10. Fundamental oscillation frequency F 1 MHz to 5 MHz 5 MHz to 10 MHz 10 MHz to 15 MHz 15 MHz to 20 MHz Table 11. Fundamental oscillation frequency F 15 MHz to 20 MHz 20 MHz to 25 MHz ...
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... NXP Semiconductors 12.2 RTC 32 kHz oscillator component selection Fig 15. RTC oscillator modes and models: oscillation mode of operation and external The RTC external oscillator circuit is shown in integrated on chip, only a crystal, the capacitances C externally to the microcontroller. Table 12 capacitance of the crystal and is usually specified by the crystal manufacturer. The actual C influences oscillation frequency ...
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... NXP Semiconductors 13. Package outline LQFP64: plastic low profile quad flat package; 64 leads; body 1 pin 1 index DIMENSIONS (mm are the original dimensions) A UNIT max. 0.20 1.45 mm 1.6 0.25 0.05 1.35 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION ...
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... NXP Semiconductors HVQFN64: plastic thermal enhanced very thin quad flat package; no leads; 64 terminals; body 0.85 mm terminal 1 index area terminal 1 64 index area DIMENSIONS (mm are the original dimensions) A UNIT max. 0.05 0.80 0. 0.00 0.65 0.18 OUTLINE VERSION IEC SOT804 Fig 17. Package outline SOT804-2 (HVQFN64) ...
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... NXP Semiconductors 14. Abbreviations Table 13. Acronym A/D ADC AHB AMBA APB BOD CPU DAC DCC ETM FIFO GPIO JTAG LSB PLL POR PWM RAM SPI SRAM SSP UART LPC2131_32_34_36_38 Product data sheet Acronym list Description Analog-to-Digital Analog-to-Digital Converter Advanced High-performance Bus Advanced Microcontroller Bus Architecture ...
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... NXP Semiconductors 15. Revision history Table 14. Revision history Document ID LPC2131_32_34_36_38 v.5 Modifications: LPC2131_32_34_36_38 v.4 LPC2131_32_34_36_38 v.3 LPC2131_32_34_36_38 v.2 LPC2131_2132_2138 v.1 LPC2131_32_34_36_38 Product data sheet Release date Data sheet status 20110202 Product data sheet • Table 3 “Pin description”: Added • Table 6 “Static characteristics” ...
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... In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or ...
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... For sales office addresses, please send an email to: LPC2131_32_34_36_38 Product data sheet own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ ...
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... NXP Semiconductors 18. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 2.1 Enhancements brought by LPC213x/01 devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 2.2 Key features common for LPC213x and LPC213x/ Ordering information . . . . . . . . . . . . . . . . . . . . . 2 3.1 Ordering options . . . . . . . . . . . . . . . . . . . . . . . . 3 4 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 4 5 Pinning information . . . . . . . . . . . . . . . . . . . . . . 5 5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 9 6 Functional description . . . . . . . . . . . . . . . . . . 13 6 ...