LPC2106FBD48/01,15 NXP Semiconductors, LPC2106FBD48/01,15 Datasheet - Page 16
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LPC2106FBD48/01,15
Manufacturer Part Number
LPC2106FBD48/01,15
Description
IC ARM7 MCU FLASH 128K 48-LQFP
Manufacturer
NXP Semiconductors
Series
LPC2100r
Datasheet
1.LPC2104FBD480115.pdf
(41 pages)
Specifications of LPC2106FBD48/01,15
Program Memory Type
FLASH
Program Memory Size
128KB (128K x 8)
Package / Case
48-LQFP
Core Processor
ARM7
Core Size
16/32-Bit
Speed
60MHz
Connectivity
I²C, Microwire, SPI, SSI, SSP, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
32
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC21
Core
ARM7TDMI-S
Data Bus Width
16 bit, 32 bit
Data Ram Size
64 KB
Interface Type
I2C/SPI/UART
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
32
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, KSK-LPC2106-PL, DB-LQFP48-LPC2106
Minimum Operating Temperature
- 40 C
Cpu Family
LPC2000
Device Core
ARM7TDMI-S
Device Core Size
16/32Bit
Frequency (max)
60MHz
Total Internal Ram Size
64KB
# I/os (max)
32
Number Of Timers - General Purpose
2
Operating Supply Voltage (typ)
1.8/3.3V
Operating Supply Voltage (max)
1.95/3.6V
Operating Supply Voltage (min)
1.65/3V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
48
Package Type
LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
568-4310 - EVAL BOARD LPC2158 W/LCD568-4297 - BOARD EVAL LPC21XX MCB2100622-1019 - BOARD FOR LPC2106 48-LQFP622-1008 - BOARD FOR LPC9103 10-HVSON622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K568-1756 - BOARD EVAL FOR LPC210X ARM MCU
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4367
935286617151
LPC2106FBD48/01-S
935286617151
LPC2106FBD48/01-S
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LPC2106FBD48/01,15
Manufacturer:
NXP
Quantity:
250
Company:
Part Number:
LPC2106FBD48/01,15
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
LPC2104_2105_2106_7
Product data sheet
6.10.1 Features
6.9.1 Features
6.9.2 Features added with the Fast GPIO set of registers available on
6.10 UARTs
6.9 General purpose parallel I/O
Table 7.
Device pins that are not connected to a specific peripheral function are controlled by the
GPIO registers. Pins may be dynamically configured as inputs or outputs. Separate
registers allow setting or clearing any number of outputs simultaneously. The value of the
output register may be read back, as well as the current state of the port pins.
LPC2104/2105/2106/01 only
The LPC2104/2105/2106 each contain two UARTs. One UART provides a full modem
control handshake interface, the other provides only transmit and receive data lines.
PINSEL1
25:24
27:26
29:28
31:30
•
•
•
•
•
•
•
•
•
•
•
•
Direction control of individual bits.
Separate control of output set and clear.
All I/O default to inputs after reset.
Fast GPIO registers are relocated to the ARM local bus for the fastest possible I/O
timing, enabling port pin toggling up to 3.5 times faster than earlier LPC2000 devices.
Mask registers allow treating sets of port bits as a group, leaving other bits
unchanged.
All Fast GPIO registers are byte addressable.
Entire port value can be written in one instruction.
Ports are accessible via either the legacy group of registers (GPIOs) or the group of
registers providing accelerated port access (Fast GPIOs).
16 byte Receive and Transmit FIFOs
Register locations conform to 16C550 industry standard
Receiver FIFO trigger points at 1 B, 4 B, 8 B, and 14 B
Built-in baud rate generator
Pin function select register 1 (PINSEL1 - 0xE002 C004)
Pin name
P0.28
P0.29
P0.30
P0.31
Rev. 07 — 20 June 2008
Value
0
0
0
0
0
0
0
0
0
1
0
1
0
1
0
1
LPC2104/2105/2106
Function
GPIO Port 0.28
TMS
GPIO Port 0.29
TCK
GPIO Port 0.30
TDI
GPIO Port 0.31
TDO
Single-chip 32-bit microcontrollers
…continued
© NXP B.V. 2008. All rights reserved.
Value after
reset
0
0
0
0
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