Z8F042AHH020SC Zilog, Z8F042AHH020SC Datasheet - Page 73
![IC ENCORE XP MCU FLASH 4K 20SSOP](/photos/9/30/93032/269-20-ssop_sml.jpg)
Z8F042AHH020SC
Manufacturer Part Number
Z8F042AHH020SC
Description
IC ENCORE XP MCU FLASH 4K 20SSOP
Manufacturer
Zilog
Series
Encore!® XP®r
Specifications of Z8F042AHH020SC
Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
IrDA, UART/USART
Peripherals
Brown-out Detect/Reset, LED, LVD, POR, PWM, Temp Sensor, WDT
Number Of I /o
17
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
20-SSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
269-3369
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Table 35. Interrupt Request 2 Register (IRQ2)
BITS
FIELD
RESET
R/W
ADDR
PS022825-0908
Interrupt Request 2 Register
IRQ0 Enable High and Low Bit Registers
R/W
7
0
The Interrupt Request 2 (IRQ2) register
tored and polled interrupts. When a request is presented to the interrupt controller, the cor-
responding bit in the IRQ2 register becomes 1. If interrupts are globally enabled (vectored
interrupts), the interrupt controller passes an interrupt request to the eZ8 CPU. If interrupts
are globally disabled (polled interrupts), the eZ8 CPU can read the Interrupt Request 2
register to determine if any interrupt requests are pending.
Reserved—Must be 0.
PCxI—Port C Pin x Interrupt Request
0 = No interrupt request is pending for GPIO Port C pin x.
1 = An interrupt request from GPIO Port C pin x is awaiting service.
where x indicates the specific GPIO Port C pin number (0–3).
Table 36
registers
Interrupt Request 0 register.
Table 36. IRQ0 Enable and Priority Encoding
IRQ0ENH[x] IRQ0ENL[x] Priority
where x indicates the register bits from 0–7.
0
0
1
1
(Table 37
describes the priority control for IRQ0. The IRQ0 Enable High and Low Bit
R/W
6
0
Reserved
and
0
1
0
1
R/W
Table
5
0
38) form a priority encoded enabling for interrupts in the
Disabled
Level 1
Level 2
Level 3
R/W
4
0
FC6H
(Table
PC3I
R/W
Description
Disabled
Low
Medium
High
35) stores interrupt requests for both vec-
3
0
Z8 Encore! XP
PC2I
R/W
2
0
Product Specification
PC1I
R/W
1
0
®
Interrupt Controller
F082A Series
PC0I
R/W
0
0
62
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