ST7FLIT19BY1B6 STMicroelectronics, ST7FLIT19BY1B6 Datasheet - Page 53

IC MCU 8BIT 4K FLASH 16DIP

ST7FLIT19BY1B6

Manufacturer Part Number
ST7FLIT19BY1B6
Description
IC MCU 8BIT 4K FLASH 16DIP
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet

Specifications of ST7FLIT19BY1B6

Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
13
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
16-DIP (0.300", 7.62mm)
Processor Series
ST7FLIT1x
Core
ST7
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
17
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Development Tools By Supplier
ST7FLITE-SK/RAIS, ST7FLIT1B-D/RAIS, ST7MDT10-DVP3, ST7MDT10-EMU3, STX-RLINK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 7 Channel
For Use With
497-6232 - BOARD EVAL ST7LITE1B,STP5NK60Z497-5049 - KIT STARTER RAISONANCE ST7FLITE497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-5629-5

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ST7FLIT19BY1B6
Manufacturer:
ALTERA
Quantity:
101
I/O PORTS (Cont’d)
10.7 DEVICE-SPECIFIC I/O PORT CONFIGURATION
The I/O port register configurations are summa-
rised as follows.
Standard Ports
PA7:0, PB6:0
PC1:0 (multiplexed with OSC1,OSC2)
The selection between OSC1 or PC0 and OSC2 or
PC1 is done by option byte. Refer to
on page
on PC1:0.
Note: PCOR not implemented but p-transistor al-
ways active in output mode (refer to
page
Table 10. Port Configuration (Standard ports)
Note: On ports where the external interrupt capability is selected using the EISR register, the configura-
tion will be as follows:
Table 11. I/O Port Register Map and Reset Values
floating input
pull-up input
open drain output
push-pull output
floating input
push-pull output
Address
(Hex.)
0000h
0001h
50)
Port A
Port B
Port A
Port B
Port
Port
149. Interrupt capability is not available
PADR
Reset Value
PADDR
Reset Value
MODE
Register
Label
MODE
PA7:0
PB6:0
PA7:0
PB6:0
Pin name
Pin name
MSB
MSB
7
1
0
DDR
0
0
1
1
OR = 0
OR = 0
floating
floating
floating
floating
Figure 32 on
section 15.1
6
1
0
DDR
OR
0
1
0
1
0
1
Input
Input
5
1
0
pull-up interrupt
pull-up interrupt
Interrupt Ports
Ports where the external interrupt capability is
selected using the EISR register
OR = 1
OR = 1
floating input
pull-up interrupt input
open drain output
push-pull output
pull-up
pull-up
4
1
0
MODE
3
1
0
open drain
open drain
open drain
open drain
OR = 0
OR = 0
2
1
0
Output
Output
1
1
0
ST7LITE1xB
DDR
0
0
1
1
push-pull
push-pull
push-pull
push-pull
OR = 1
OR = 1
LSB
LSB
53/159
OR
0
1
0
0
1
0
1
1

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