ST72F264G1M6 STMicroelectronics, ST72F264G1M6 Datasheet - Page 39

• Manufacturer Part Number: ST72F264G1M6
• Description: IC MCU 8BIT 4K 28 SOIC
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST72F264G1M6

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Processor Series: ST72F2x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: I2C, SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 22
• Number Of Timers: 4 bit
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST7F264-IND/USB, ST72F34X-SK/RAIS, ST7MDT10-DVP3, ST7MDT10-EMU3, STX-RLINK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16 bit
• For Use With: 497-6423 - BOARD EVAL BASED ON ST72264G1497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
• Lead Free Status / RoHS Status: Request inventory verification / Request inventory verification
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 497-2105-5

I/O PORTS (Cont’d)
Figure 27. I/O Port General Block Diagram
Table 7. I/O Port Mode Options
Legend:NI - not implemented
Input
Output
REGISTER
ACCESS
INTERRUPT
REQUEST (ei
EXTERNAL
Off - implemented not activated
On - implemented and activated
DDR SEL
OR SEL
DR SEL
Floating with/without Interrupt
Pull-up with/without Interrupt
Push-pull
Open Drain (logic level)
True Open Drain
Configuration Mode
DDR
OR
DR
x
)
SENSITIVITY
SELECTION
ALTERNATE
OUTPUT
From on-chip periphera
ALTERNATE
ENABLE
BIT
If implemented
1
0
Combinational
Logic
l
1
0
FROM
OTHER
BITS
Pull-Up
Note: Refer to the Port Configuration
table for device specific information.
Off
On
Off
NI
Note: The diode to V
true open drain pads. A local protection between
the pad and V
vice against positive stress.
ST72260Gx, ST72262Gx, ST72264Gx
N-BUFFER
PULL-UP
CONDITION
P-Buffer
Off
On
Off
NI
OL
SCHMITT
TRIGGER
CMOS
is implemented to protect the de-
V
DD
DD
NI (see note)
is not implemented in the
to V
On
DD
P-BUFFER
(see table below)
To on-chip peripheral
V
Diodes
DD
DIODES
(see table below)
PULL-UP
(see table below)
ALTERNATE
ANALOG
INPUT
to V
INPUT
PAD
On
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