ST72F321BAR9T6 STMicroelectronics, ST72F321BAR9T6 Datasheet - Page 155

MCU 8BIT 60KB FLASH/ROM 64-LQFP

ST72F321BAR9T6

Manufacturer Part Number
ST72F321BAR9T6
Description
MCU 8BIT 60KB FLASH/ROM 64-LQFP
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet

Specifications of ST72F321BAR9T6

Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
48
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3.8 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
Processor Series
ST72F3x
Core
ST7
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
I2C, SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
48
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST7232X-EVAL, ST7232X-SK/RAIS, ST72321B-D/RAIS, ST7MDT20-DVP3, ST7MDT20J-EMU3, ST7MDT20M-EMU3, STX-RLINK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
For Use With
497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
497-5583

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0
12.8 I/O PORT PIN CHARACTERISTICS
12.8.1 General Characteristics
Subject to general operating conditions for V
Figure 78. Unused I/Os configured as input
Notes:
1. Data based on characterization results, not tested in production.
2. Hysteresis voltage between Schmitt trigger switching levels. Based on characterization results, not tested.
3. When the current limitation is not possible, the V
tion. A positive injection is induced by V
on page 139
4. Configuration not recommended, all unused pins must be kept at a fixed voltage: using the output mode of the I/O for
example and leaving the I/O unconnected on the board or an external pull-up or pull-down resistor (see
peak current value taken at a fixed V
production. This value depends on V
5. The R
scribed in
6. To generate an external interrupt, a minimum pulse width has to be applied on an I/O port pin configured as an external
interrupt source.
ΣI
I
Symbol
INJ(PIN)
t
t
Note: I/O can be left unconnected if it is configured as output
(0 or 1) by the software. This has the advantage of
INJ(PIN)
greater EMC robustness and lower cost.
t
r(IO)out
f(IO)out
w(IT)in
V
R
C
V
V
I
I
hys
PU
S
IH
L
IO
IL
3)
PU
3)
Figure
pull-up equivalent resistor is based on a resistive transistor (corresponding I
Input low level voltage
Input high level voltage
Schmitt trigger voltage hysteresis
Injected Current on PC6 (Flash de-
vices only)
Injected Current on an I/O pin
Total injected current (sum of all I/O
and control pins)
Input leakage current
Static current consumption
Weak pull-up equivalent resistor
I/O pin capacitance
Output high to low level fall time
Output low to high level rise time
External interrupt pulse time
for more details.
79).
V
DD
Parameter
10kΩ
10kΩ
UNUSED I/O PORT
UNUSED I/O PORT
1)
1)
DD
IN
IN
value, based on design simulation and technology characteristics, not tested in
and temperature values.
>V
6)
ST7XXX
ST7XXX
ST72321BRx, ST72321BARx ST72321BJx, ST72321BKx
DD
5)
1)
1)
2)
while a negative injection is induced by V
CMOS ports
V
V
Floating input mode
V
C
Between 10% and 90%
IN
DD
DD
SS
IN
L
=50pF
=
maximum must be respected, otherwise refer to I
, f
=5V
V
V
OSC
SS
IN
Conditions
V
, and T
DD
Figure 79. Typical I
V
DD
=5V
A
4)
unless otherwise specified.
90
80
70
60
50
40
30
20
10
0
2
0.7xV
2.5
Min
50
0
1
Ta=140°C
Ta=95°C
Ta=25°C
Ta=-45°C
3
DD
PU
3.5
IN
vs. V
PU
<V
V dd(V)
Typ
400
120
0.7
25
25
5
4
SS
current characteristics de-
DD
. Refer to
4.5
with V
0.3xV
5
Max
± 25
INJ(PIN)
Figure
250
± 4
+4
±1
5.5
section 12.2.2
DD
IN
=V
78). Static
specifica-
6
155/187
SS
Unit
t
mA
CPU
μA
pF
ns
V

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