ST72F321BAR9T6 STMicroelectronics, ST72F321BAR9T6 Datasheet - Page 163

MCU 8BIT 60KB FLASH/ROM 64-LQFP

ST72F321BAR9T6

Manufacturer Part Number
ST72F321BAR9T6
Description
MCU 8BIT 60KB FLASH/ROM 64-LQFP
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet

Specifications of ST72F321BAR9T6

Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
48
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3.8 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
Processor Series
ST72F3x
Core
ST7
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
I2C, SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
48
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST7232X-EVAL, ST7232X-SK/RAIS, ST72321B-D/RAIS, ST7MDT20-DVP3, ST7MDT20J-EMU3, ST7MDT20M-EMU3, STX-RLINK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
For Use With
497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
497-5583

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COMMUNICATION INTERFACE CHARACTERISTICS (Cont’d)
Figure 90. SPI Slave Timing Diagram with CPHA=1
Figure 91. SPI Master Timing Diagram
Notes:
1. Measurement points are done at CMOS levels: 0.3xV
2. When no communication is on-going the data output line of the SPI (MOSI in master mode, MISO in slave mode) has
its alternate function capability released. In this case, the pin status depends of the I/O port configuration.
MISO
MOSI
MISO
MOSI
SS
CPHA=1
CPOL=0
CPHA=1
CPOL=1
SS
OUTPUT
INPUT
CPHA = 0
CPOL = 0
CPHA = 0
CPOL = 1
CPHA = 1
CPOL = 0
CPHA = 1
CPOL = 1
INPUT
OUTPUT
INPUT
INPUT
see
note 2
See note 2
t
a(SO)
t
su(SS)
HZ
t
t
t
su(MI)
w(SCKH)
w(SCKL)
t
su(SI)
MSB OUT
MSB IN
ST72321BRx, ST72321BARx ST72321BJx, ST72321BKx
MSB OUT
t
MSB IN
h(MI)
1)
t
h(SI)
t
c(SCK)
t
c(SCK)
t
t
t
v(MO)
w(SCKH)
w(SCKL)
t
v(SO)
DD
and 0.7xV
BIT6 OUT
1)
BIT6 IN
BIT6 OUT
DD
.
BIT1 IN
t
h(MO)
t
h(SO)
t
t
r(SCK)
f(SCK)
t
t
r(SCK)
f(SCK)
LSB OUT
LSB IN
LSB OUT
LSB IN
t
h(SS)
See note 2
t
dis(SO)
163/187
note 2
see

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