Z16F2810FI20SG Zilog, Z16F2810FI20SG Datasheet - Page 178

IC ZNEO MCU FLASH 128K 80QFP

Z16F2810FI20SG

Manufacturer Part Number
Z16F2810FI20SG
Description
IC ZNEO MCU FLASH 128K 80QFP
Manufacturer
Zilog
Series
Encore!® ZNEOr
Datasheet

Specifications of Z16F2810FI20SG

Core Processor
ZNEO
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
60
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
80-BQFP
Processor Series
Z16F2x
Core
Zneo
Data Bus Width
16 bit
Data Ram Size
4 B
Interface Type
ESPI, I2C, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
60
Number Of Timers
4
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Development Tools By Supplier
Z16F2800100ZCOG
Minimum Operating Temperature
0 C
On-chip Adc
10 bit, 12 Channel
For Use With
770-1003 - ISP 4PORT FOR ZILOG ZNEO MCU269-4537 - DEV KIT FOR Z16F ZNEO
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
269-4567

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
Z16F2810FI20SG
Manufacturer:
Zilog
Quantity:
211
Part Number:
Z16F2810FI20SG
Manufacturer:
Zilog
Quantity:
10 000
Table 87. Noise Filter Control Register (UxCTL1 with MSEL = 001b)
Table 88. LIN Control Register (UxCTL1 with MSEL = 010b)
PS022008-0810
BITS
FIELD
RESET
R/W
ADDR
BITS
FIELD
RESET
R/W
ADDR
NFEN
LMST
R/W
R/W
7
7
0
0
Noise Filter Control Register (LIN-UART Control1 Register with
MSEL = 001b).
When
NFEN—Noise Filter Enable
0 = Noise filter is disabled. 
1 = Noise filter is enabled. Receive data is preprocessed by the noise filter.
NFCTL—Noise Filter Control
This field controls the delay and noise rejection characteristics of the noise filter. The wider
the counter the more delay that is introduced by the filter and the wider the noise event that
is filtered.
000 = 4-bit up/down counter
001 = 5-bit up/down counter
010 = 6-bit up/down counter
011 = 7-bit up/down counter
100 = 8-bit up/down counter
101 = 9-bit up/down counter
110 = 10-bit up/down counter
111 = 11-bit up/down counter
LIN Control Register (LIN-UART Control1 Register with MSEL = 010b)
When
MSEL
MSEL
LSLV
R/W
R/W
6
0
6
0
=
=
001b
010b
, this register provides control for the digital noise filter.
, this register provides control for LIN mode of operation.
NFCTL
ABEN
FF-E203H, FF-E213H with MSEL = 010b
R/W
FF-E203H, FF-E213H with MSEL = 001b
R/W
5
5
0
0
P R E L I M I N A R Y
ABIEN
R/W
R/W
4
0
4
0
R/W
R
3
0
3
0
LinState[1:0]
R/W
R
2
0
2
0
Reserved
Product Specification
ZNEO
R/W
TxBreakLength
R
1
1
0
0
Z16F Series
LIN-UART
R/W
R
0
0
0
0
162

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