ST10R172LT6 STMicroelectronics, ST10R172LT6 Datasheet - Page 50

IC MCU 16BIT LV ROMLESS 100-TQFP

ST10R172LT6

Manufacturer Part Number
ST10R172LT6
Description
IC MCU 16BIT LV ROMLESS 100-TQFP
Manufacturer
STMicroelectronics
Series
ST10r
Datasheet

Specifications of ST10R172LT6

Core Processor
ST10
Core Size
16-Bit
Speed
50MHz
Connectivity
EBI/EMI, SSP, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
77
Program Memory Type
ROMless
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-TQFP, 144-VQFP
Processor Series
ST10R1x
Core
ST10
Data Bus Width
16 bit
Data Ram Size
1 KB
Interface Type
SSP, USART
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
77
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
In Transition
Other names
497-2044

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ST10R172L - ELECTRICAL CHARACTERISTICS
15.3.4 Demultiplexed Bus
50/68
1
V
ALE cycle time = 4 TCL + 2
Parameter
ALE high time
Address (P1, P4), BHE
setup to ALE
Address setup to RD, WR
(with RW-delay)
Address setup to RD, WR
(no RW-delay)
RD, WR low time
(with RW-delay)
RD, WR low time
RD to valid data in
RD to valid data in
ALE low to valid data in
Address to valid data in
Data hold after RD
rising edge
Data float after RD rising
edge (with RW-delay)
Data float after RD rising
edge (no RW-delay)
Data valid to WR
(no RW-delay)
(with RW-delay)
(no RW-delay)
DD
= 3.3 V
0.3 V
1 2
1) 2)
V
SS
t
A
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
+
5
6
80
81
12
13
14
15
16
17
18
20
21
22
= 0 V
t
C
Table 15 Demultiplexed bus
+
CC
CC
CC
CC
CC
CC
SR
SR
SR
SR
SR
SR
SR
CC
t
F
(40 ns at 50 MHz CPU clock without waitstates)
Max CPU Clock 50MHz
min.
7 +
3 +
13 +
3 +
13 +
23 +
0
13 +
t
t
2t
A
A
2t
t
t
t
C
C
C
A
A
T
A
max.
5 +
15 +
15 +
20 + 2
t
15
+
5 +
2
C
= -40°C to +85 °C
t
A
t
F
2
t
t
+ 2
C
F
t
t
C
A
+
t
A
t
+
A
+
2
t
C
Variable CPU Clock
1/2TCL = 1 to 50 MHz
min.
TCL - 3 +
TCL - 7 +
2TCL - 7 +
TCL - 7 +
2TCL - 7 +
3TCL - 7 +
0
2TCL - 7 +
C
t
t
2t
A
A
2t
t
t
t
L
C
C
C
A
A
= 50 pF
max.
2TCL - 15
+
3TCL - 15
+
3TCL - 15
+
4TCL - 20
+ 2
2TCL - 5
+
TCL - 5
+
t
t
t
t
t
C
C
A
F
F
t
A
+ 2
+ 2
+
+
t
C
t
t
t
A
A
C
2
2
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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