MC908JL16CFJER Freescale Semiconductor, MC908JL16CFJER Datasheet - Page 79

IC MCU 8BIT 16K FLASH 32-LQFP

MC908JL16CFJER

Manufacturer Part Number
MC908JL16CFJER
Description
IC MCU 8BIT 16K FLASH 32-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC908JL16CFJER

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SCI
Peripherals
LED, LVD, POR, PWM
Number Of I /o
26
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
Controller Family/series
HC08
No. Of I/o's
26
Ram Memory Size
512Byte
Cpu Speed
8MHz
No. Of Timers
2
Digital Ic Case Style
LQFP
Rohs Compliant
Yes
Processor Series
HC08JL
Core
HC08
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SCI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
26
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, DEMO908JL16E, M68CBL05CE
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 13 Channel
For Use With
DEMO908JL16E - BOARD DEMO FOR MC908JL16
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
MC908JL16CFJERTR

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PS[2:0] — Prescaler Select Bits
6.9.2 TIM Counter Registers
The two read-only TIM counter registers contain the high and low bytes of the value in the TIM counter.
Reading the high byte (TCNTH) latches the contents of the low byte (TCNTL) into a buffer. Subsequent
reads of TCNTH do not affect the latched TCNTL value until TCNTL is read. Reset clears the TIM counter
registers. Setting the TIM reset bit (TRST) also clears the TIM counter registers.
If you read TCNTH during a break interrupt, be sure to unlatch TCNTL by reading TCNTL before exiting
the break interrupt. Otherwise, TCNTL retains the value latched during the break.
Freescale Semiconductor
These read/write bits select one of the seven prescaler outputs as the input to the TIM counter as
Table 6-2
shows. Reset clears the PS[2:0] bits.
Address: T1CNTH, $0021 and T2CNTH, $0031
Address: T1CNTL, $0022 and T2CNTL, $0032
Reset:
Reset:
Read:
Read:
Write:
Write:
PS2
0
0
0
0
1
1
1
1
Bit 15
Bit 7
Bit 7
Bit 7
0
0
Figure 6-5. TIM Counter Registers High (TCNTH)
Figure 6-6. TIM Counter Registers Low (TCNTL)
= Unimplemented
= Unimplemented
PS1
14
0
0
1
1
0
0
1
1
6
0
6
6
0
MC68HC908JL16 Data Sheet, Rev. 1.1
Table 6-2. Prescaler Selection
PS0
13
5
0
5
5
0
0
1
0
1
0
1
0
1
NOTE
12
4
0
4
4
0
Internal bus clock ÷ 16
Internal bus clock ÷ 32
Internal bus clock ÷ 64
T2CLK (for TIM2 only)
Internal bus clock ÷ 1
Internal bus clock ÷ 2
Internal bus clock ÷ 4
Internal bus clock ÷ 8
TIM Clock Source
11
3
0
3
3
0
10
2
0
2
2
0
1
9
0
1
1
0
Bit 0
Bit 8
Bit 0
Bit 0
0
0
I/O Registers
79

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