MC908QC16CDZE Freescale Semiconductor, MC908QC16CDZE Datasheet - Page 130
MC908QC16CDZE
Manufacturer Part Number
MC908QC16CDZE
Description
IC MCU 8BIT 16K FLASH 28-SOIC
Manufacturer
Freescale Semiconductor
Series
HC08r
Specifications of MC908QC16CDZE
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
24
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Processor Series
HC08QC
Core
HC08
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
ESCI/SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
26
Number Of Timers
6
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68CBL05AE, DEMO908QB8, DEMO908QC16
Minimum Operating Temperature
- 40 C
On-chip Adc
10-ch x 10-bit
For Use With
DEMO908QC16 - BOARD DEMO FOR MC908QC16
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC908QC16CDZE
Manufacturer:
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Quantity:
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Part Number:
MC908QC16CDZE
Manufacturer:
FREESCALE
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Enhanced Serial Communications Interface (ESCI) Module
13.3.3.3 Data Sampling
The receiver samples the RxD pin at the RT clock rate. The RT clock is an internal signal with a frequency
16 times the baud rate. To adjust for baud rate mismatch, the RT clock is resynchronized at these times
(see
To locate the start bit, data recovery logic does an asynchronous search for a 0 preceded by three 1s.
When the falling edge of a possible start bit occurs, the RT clock begins to count to 16.
To verify the start bit and to detect noise, data recovery logic takes samples at RT3, RT5, and RT7.
Table 13-1
If start bit verification is not successful, the RT clock is reset and a new search for a start bit begins.
130
•
•
Figure
After every start bit
After the receiver detects a data bit change from 1 to 0 (after the majority of data bit samples at
RT8, RT9, and RT10 returns a valid 1 and the majority of the next RT8, RT9, and RT10 samples
returns a valid 0)
summarizes the results of the start bit verification samples.
13-6):
RT CLOCK
RT CLOCK
SAMPLES
CLOCK
RESET
STATE
RxD
RT
MC68HC908QC16 • MC68HC908QC8 • MC68HC908QC4 Data Sheet, Rev. 5
RT3, RT5, and RT7 Samples
Figure 13-6. Receiver Data Sampling
000
001
010
011
100
101
110
111
Table 13-1. Start Bit Verification
QUALIFICATION
START BIT
VERIFICATION
START BIT
Start Bit Verification
Yes
Yes
Yes
Yes
START BIT
No
No
No
No
SAMPLING
DATA
Noise Flag
0
1
1
0
1
0
0
0
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