C8051F411-GM Silicon Laboratories Inc, C8051F411-GM Datasheet - Page 136

IC 8051 MCU 32K FLASH 28QFN

C8051F411-GM

Manufacturer Part Number
C8051F411-GM
Description
IC 8051 MCU 32K FLASH 28QFN
Manufacturer
Silicon Laboratories Inc
Series
C8051F41xr
Datasheets

Specifications of C8051F411-GM

Program Memory Type
FLASH
Program Memory Size
32KB (32K x 8)
Package / Case
28-QFN
Core Processor
8051
Core Size
8-Bit
Speed
50MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
20
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.25 V
Data Converters
A/D 20x12b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F4x
Core
8051
Data Bus Width
8 bit
Data Ram Size
2368 B
Interface Type
I2C, SMBus, SPI, UART
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
20
Number Of Timers
4
Operating Supply Voltage
2 V to 5.25 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F410DK
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 20 Channel
On-chip Dac
12 bit, 2 Channel
No. Of I/o's
20
Ram Memory Size
2368Byte
Cpu Speed
50MHz
No. Of Timers
4
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
770-1006 - ISP 4PORT FOR SILABS C8051F MCU336-1454 - ADAPTER PROGRAM TOOLSTICK F411336-1317 - KIT EVAL FOR C8051F411336-1314 - KIT DEV FOR C8051F41X
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1309

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C8051F410/1/2/3
16.1.3. Flash Write Procedure
Bytes in Flash memory can be written one byte at a time, or in groups of two. The FLBWE bit in register
PFE0CN (SFR Definition 13.1) controls whether a single byte or a block of two bytes is written to Flash
during a write operation. When FLBWE is cleared to ‘0’, the Flash will be written one byte at a time. When
FLBWE is set to ‘1’, the Flash will be written in two-byte blocks. Block writes are performed in the same
amount of time as single-byte writes, which can save time when storing large amounts of data to Flash
memory.
During a single-byte write to Flash, bytes are written individually, and a Flash write will be performed after
each MOVX write instruction. The recommended procedure for writing Flash in single bytes is:
Steps 3–9 must be repeated for each byte to be written.
For block Flash writes, the Flash write procedure is only performed after the last byte of each block is writ-
ten with the MOVX write instruction. A Flash write block is two bytes long, from even addresses to odd
addresses. Writes must be performed sequentially (i.e. addresses ending in 0b and 1b must be written in
order). The Flash write will be performed following the MOVX write that targets the address ending in 1b. If
a byte in the block does not need to be updated in Flash, it should be written to 0xFF. The recommended
procedure for writing Flash in blocks is:
Steps 3-15 must be repeated for each block to be written.
136
Step 1. Disable interrupts.
Step 2. Clear the FLBWE bit (register PFE0CN) to select single-byte write mode.
Step 3. Write '0000' to FLSCL.3–0.
Step 4. Write the first key code to FLKEY: 0xA5.
Step 5. Write the second key code to FLKEY: 0xF1.
Step 6. Set the PSWE bit (register PSCTL).
Step 7. Clear the PSEE bit (register PSCTL).
Step 8. Using the MOVX instruction, write a single data byte to the desired location within the 512-
Step 9. Clear the PSWE bit.
Step 10. Re-enable interrupts.
Step 1. Disable interrupts.
Step 2. Set the FLBWE bit (register PFE0CN) to select block write mode.
Step 3. Write '0000' to FLSCL.3–0.
Step 4. Write the first key code to FLKEY: 0xA5.
Step 5. Write the second key code to FLKEY: 0xF1.
Step 6. Set the PSWE bit (register PSCTL).
Step 7. Clear the PSEE bit (register PSCTL).
Step 8. Using the MOVX instruction, write the first data byte to the even block location (ending in
Step 9. Clear the PSWE bit (register PSCTL).
Step 10. Write the first key code to FLKEY: 0xA5.
Step 11. Write the second key code to FLKEY: 0xF1.
Step 12. Set the PSWE bit (register PSCTL).
Step 13. Clear the PSEE bit (register PSCTL).
Step 14. Using the MOVX instruction, write the second data byte to the odd block location (ending
Step 15. Clear the PSWE bit (register PSCTL).
Step 16. Re-enable interrupts.
byte sector.
0b).
in 1b).
Rev. 1.1

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