MC9S08GT32ACFDE Freescale Semiconductor, MC9S08GT32ACFDE Datasheet - Page 99

• Manufacturer Part Number: MC9S08GT32ACFDE
• Description: IC MCU 32K FLASH 2K RAM 48-QFN
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of MC9S08GT32ACFDE

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 39
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-QFN
• Processor Series: S08GT
• Core: HCS08
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: SCI/SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 39
• Number Of Timers: 2
• Operating Supply Voltage: 0 V to 1.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWS08
• Development Tools By Supplier: M68EVB908GB60E, M68DEMO908GB60E
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• For Use With: M68DEMO908GB60E - BOARD DEMO MC9S08GB60M68EVB908GB60E - BOARD EVAL FOR MC9S08GB60
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

6.6.6
Port F includes eight general-purpose I/O pins that are not shared with any peripheral module. Port F pins
used as general-purpose I/O pins are controlled by the port F data (PTFD), data direction (PTFDD), pullup
enable (PTFPE), and slew rate control (PTFSE) registers.
Freescale Semiconductor
PTFPE[7:0]
PTFD[7:0]
Reset
Reset
Field
Field
7:0
7:0
W
W
R
R
PTFPE7
PTFD7
Port F Registers (PTFD, PTFPE, PTFSE, and PTFDD)
Port PTF Data Register Bits — For port F pins that are inputs, reads return the logic level on the pin. For port
F pins that are configured as outputs, reads return the last value written to this register.
Writes are latched into all bits of this register. For port F pins that are configured as outputs, the logic level is
driven out the corresponding MCU pin.
Reset forces PTFD to all 0s, but these 0s are not driven out the corresponding pins because reset also configures
all port pins as high-impedance inputs with pullups disabled.
Pullup Enable for Port F Bits — For port F pins that are inputs, these read/write control bits determine whether
internal pullup devices are enabled. For port F pins that are configured as outputs, these bits are ignored and the
internal pullup devices are disabled.
0 Internal pullup device disabled.
1 Internal pullup device enabled.
0
0
7
7
PTFPE6
PTFD6
0
0
6
6
Figure 6-30. Pullup Enable for Port F (PTFPE)
Figure 6-29. Port PTF Data Register (PTFD)
Table 6-22. PTFPE Field Descriptions
Table 6-21. PTFD Field Descriptions
PTFPE5
PTFD5
MC9S08GB60A Data Sheet, Rev. 2
0
0
5
5
PTFPE4
PTFD4
0
0
4
4
Description
Description
PTFPE3
PTFD3
3
0
3
0
PTFPE2
PTFD2
0
0
2
2
Chapter 6 Parallel Input/Output
PTFPE1
PTFD1
0
0
1
1
PTFPE0
PTFD0
0
0
0
0
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