C8051F410-GQ Silicon Laboratories Inc, C8051F410-GQ Datasheet - Page 41

IC 8051 MCU 32K FLASH 32LQFP

C8051F410-GQ

Manufacturer Part Number
C8051F410-GQ
Description
IC 8051 MCU 32K FLASH 32LQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F41xr
Datasheets

Specifications of C8051F410-GQ

Program Memory Type
FLASH
Program Memory Size
32KB (32K x 8)
Package / Case
32-LQFP
Core Processor
8051
Core Size
8-Bit
Speed
50MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
24
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.25 V
Data Converters
A/D 20x12b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F4x
Core
8051
Data Bus Width
8 bit
Data Ram Size
2368 B
Interface Type
I2C, SMBus, SPI, UART
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
24
Number Of Timers
4
Operating Supply Voltage
2 V to 5.25 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F410DK
Minimum Operating Temperature
- 40 C
On-chip Dac
12 bit, 2 Channel
No. Of I/o's
24
Ram Memory Size
2368Byte
Cpu Speed
50MHz
No. Of Timers
4
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
770-1006 - ISP 4PORT FOR SILABS C8051F MCU336-1453 - ADAPTER PROGRAM TOOLSTICK F410336-1317 - KIT EVAL FOR C8051F411336-1314 - KIT DEV FOR C8051F41X
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1318

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4.
V
RTC-BACKUP
V
XTAL3
XTAL4
IDAC0
IDAC1
Name
C2CK
P2.7/
P0.0/
P0.1/
GND
RST/
P0.2
P0.3
C2D
V
REGIN
V
Pinout and Package Definitions
DD
IO
‘F410/2 ‘F411/3
Pin Numbers
32
17
18
19
20
7
1
6
3
8
2
5
4
Table 4.1. Pin Definitions for the C8051F41x
28
27
16
17
18
19
6
5
2
7
1
4
3
D I/O or
D I/O or
D I/O or
D I/O or
A Out
A Out
A Out
D I/O
D I/O
D I/O
D I/O
Type
A In
A In
A In
A In
A In
Description
Core Supply Voltage.
I/O Supply Voltage.
Ground.
smaRTClock Backup Supply Voltage.
On-Chip Voltage Regulator Input.
Device Reset. Open-drain output of internal POR or V
monitor. An external source can initiate a system reset by
driving this pin low for at least 15 µs. A 1 k  pullup to V
recommended. See Reset Sources Section for a complete
description.
Clock signal for the C2 Debug Interface.
Port 2.7. See Port I/O Section for a complete description.
Bi-directional data signal for the C2 Debug Interface.
smaRTClock Oscillator Crystal Input.
See Section 20. "smaRTClock (Real Time Clock)" for a
complete description.
smaRTClock Oscillator Crystal Input.
See Section 20. "smaRTClock (Real Time Clock)" for a
complete description.
Port 0.0. See Port I/O Section for a complete description.
IDAC0 Output. See IDAC Section for complete description.
Port 0.1. See Port I/O Section for a complete description.
IDAC1 Output. See IDAC Section for complete description.
Port 0.2. See Port I/O Section for a complete description.
Port 0.3. See Port I/O Section for a complete description.
Rev. 1.1
C8051F410/1/2/3
DD
IO
is
41

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