C8051F361-GQ Silicon Laboratories Inc, C8051F361-GQ Datasheet - Page 165

• Manufacturer Part Number: C8051F361-GQ
• Description: IC 8051 MCU 32K FLASH 32LQFP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F36xr

Specifications of C8051F361-GQ

• Program Memory Type: FLASH
• Program Memory Size: 32KB (32K x 8)
• Package / Case: 32-LQFP
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 100MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 29
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 21x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: C8051F3x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C/SMBus/SPI/UART
• Maximum Clock Frequency: 100 MHz
• Number Of Programmable I/os: 29
• Number Of Timers: 4
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: KSK-SL-TOOLSTICK, PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F360DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 21-ch x 10-bit
• On-chip Dac: 1-ch x 10-bit
• Package: 32LQFP
• Device Core: 8051
• Family Name: C8051F36x
• Maximum Speed: 100 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 770-1006 - ISP 4PORT FOR SILABS C8051F MCU336-1410 - KIT DEV FOR C8051F360 FAMILY
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 336-1408

15.6.2. Multiplexed Mode
15.6.2.1.16-bit MOVX: EMI0CF[4:2] = ‘001’, ‘010’, or ‘011’.
ADDR[15:8]
ADDR[15:8]
AD[7:0]
AD[7:0]
/WR
/WR
ALE
ALE
/RD
/RD
P3.4–P4.3
P3.4–P4.3
P0.0
P4.5
P4.4
P0.0
P4.4
P4.5
P1
P1
Figure 15.7. Multiplexed 16-bit MOVX Timing
EMIF ADDRESS (8 LSBs) from
EMIF ADDRESS (8 LSBs) from
T
T
ALEH
ALEH
DPL
DPL
T
T
ALEL
ALEL
EMIF ADDRESS (8 MSBs) from DPH
EMIF ADDRESS (8 MSBs) from DPH
C8051F360/1/2/3/4/5/6/7/8/9
Rev. 1.0
Muxed 16-bit WRITE
Muxed 16-bit READ
T
T
ACS
ACS
T
WDS
EMIF WRITE DATA
T
T
ACW
ACW
EMIF READ DATA
T
RDS
T
RDH
T
T
T
WDH
ACH
ACH
P3.4–P4.3
P3.4–P4.3
P0.0
P4.5
P4.4
P0.0
P4.4
P4.5
P1
P1
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