M30622SAFP#U5 Renesas Electronics America, M30622SAFP#U5 Datasheet - Page 40

• Manufacturer Part Number: M30622SAFP#U5
• Description: IC M16C MPU ROMLESS 100QFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/60r

Specifications of M30622SAFP#U5

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: SIO, UART/USART
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 50
• Program Memory Type: ROMless
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-QFP
• For Use With: 867-1000 - KIT QUICK START RENESAS 62PM3062PT3-CPE-3 - EMULATOR COMPACT M16C/62P/30P
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

2.1 Addressing Modes
Chapter 2 Addressing Modes
This section describes addressing mode-representing symbols and operations for each addressing mode.
The M16C/60, M16C/20, M16C/Tiny series have three addressing modes outlined below.
2.1.1 General instruction addressing
2.1.2 Special instruction addressing
2.1.3 Bit instruction addressing
This addressing accesses an area from address 00000
The following lists the name of each general instruction addressing:
• Immediate
• Register direct
• Absolute
• Address register indirect
• Address register relative
• SB relative
• FB relative
• Stack pointer relative
This addressing accesses an area from address 00000
ters.
The following lists the name of each specific instruction addressing:
• 20-bit absolute
• Address register relative with 20-bit displacement
• 32-bit address register indirect
• 32-bit register direct
• Control register direct
• Program counter relative
This addressing accesses an area from address 00000
The following lists the name of each bit instruction addressing:
• Register direct
• Absolute
• Address register indirect
• Address register relative
• SB relative
• FB relative
• FLG direct
22
16
16
16
through address 0FFFF
through address 0FFFF
through address FFFFF
2.1 Addressing Modes
16
16
16
.
.
and control regis-