MC9S12GC128MFAE Freescale Semiconductor, MC9S12GC128MFAE Datasheet - Page 131
![IC MCU 16BIT 2K FLASH 48-LQFP](/photos/12/20/122024/mc9s12gc128mfae_sml.jpg)
MC9S12GC128MFAE
Manufacturer Part Number
MC9S12GC128MFAE
Description
IC MCU 16BIT 2K FLASH 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet
1.MC9S12GC16MFUE.pdf
(690 pages)
Specifications of MC9S12GC128MFAE
Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
31
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-LQFP
Processor Series
S12GC
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
4 KB
Interface Type
CAN, SCI, SPI
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
31
Number Of Timers
8
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
M68EVB912C32EE, M68DKIT912C32SLK
Minimum Operating Temperature
- 40 C
On-chip Adc
16 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC9S12GC128MFAE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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4.1.2
4.2
In typical implementations, the MEBI sub-block of the core interfaces directly with external system pins.
Some pins may not be bonded out in all implementations.
Table 4-1
of these pins and associated pull-ups or pull-downs is dependent on the mode of operation and on the
integration of this block at the chip level (chip dependent).
Freescale Semiconductor
•
•
•
•
•
•
•
•
Normal expanded wide mode
Ports A and B are configured as a 16-bit multiplexed address and data bus and port E provides bus
control and status signals. This mode allows 16-bit external memory and peripheral devices to be
interfaced to the system.
Normal expanded narrow mode
Ports A and B are configured as a 16-bit address bus and port A is multiplexed with 8-bit data.
Port E provides bus control and status signals. This mode allows 8-bit external memory and
peripheral devices to be interfaced to the system.
Normal single-chip mode
There is no external expansion bus in this mode. The processor program is executed from internal
memory. Ports A, B, K, and most of E are available as general-purpose I/O.
Special single-chip mode
This mode is generally used for debugging single-chip operation, boot-strapping, or security
related operations. The active background mode is in control of CPU execution and BDM firmware
is waiting for additional serial commands through the BKGD pin. There is no external expansion
bus after reset in this mode.
Emulation expanded wide mode
Developers use this mode for emulation systems in which the users target application is normal
expanded wide mode.
Emulation expanded narrow mode
Developers use this mode for emulation systems in which the users target application is normal
expanded narrow mode.
Special test mode
Ports A and B are configured as a 16-bit multiplexed address and data bus and port E provides bus
control and status signals. In special test mode, the write protection of many control bits is lifted
so that they can be thoroughly tested without needing to go through reset.
Special peripheral mode
This mode is intended for Freescale Semiconductor factory testing of the system. The CPU is
inactive and an external (tester) bus master drives address, data, and bus control signals.
External Signal Description
outlines the pin names and functions and gives a brief description of their operation reset state
Modes of Operation
MC9S12C-Family / MC9S12GC-Family
Rev 01.24
Chapter 4 Multiplexed External Bus Interface (MEBIV3)
131
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