M30622F8PFP#U5C Renesas Electronics America, M30622F8PFP#U5C Datasheet - Page 385
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M30622F8PFP#U5C
Manufacturer Part Number
M30622F8PFP#U5C
Description
IC M16C MCU FLASH 64K 100QFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/60r
Datasheets
1.QSK-62P_PLUS.pdf
(103 pages)
2.M30622SAFPU5.pdf
(308 pages)
3.M30620SPGPU3C.pdf
(423 pages)
Specifications of M30622F8PFP#U5C
Core Processor
M16C/60
Core Size
16-Bit
Speed
24MHz
Connectivity
I²C, IEBus, UART/USART
Peripherals
DMA, WDT
Number Of I /o
85
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-QFP
Package
100PQFP
Family Name
M16C
Maximum Speed
24 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
16|32 Bit
Number Of Programmable I/os
87
Interface Type
UART
On-chip Adc
26-chx10-bit
On-chip Dac
2-chx8-bit
Number Of Timers
11
For Use With
867-1000 - KIT QUICK START RENESAS 62PR0K33062PS001BE - R0K33062P STARTER KITR0K33062PS000BE - KIT EVAL STARTER FOR M16C/62PM3062PT3-CPE-3 - EMULATOR COMPACT M16C/62P/30P
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Part Number:
M30622F8PFP#U5CM30622F8PFP#D5C
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Quantity:
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M16C/62P Group (M16C/62P, M16C/62PT)
Rev.2.41
REJ09B0185-0241
24.7.6
24.7.7
(a) The interrupt control register for any interrupt should be modified in places where no requests for that
(b) To rewrite the interrupt control register for any interrupt after disabling that interrupt, be careful with the
(c) When using the I flag to disable an interrupt, refer to the sample program fragments shown below as you set
Examples 1 through 3 show how to prevent the I flag from being set to “1” (interrupts enabled) before the
interrupt control register is rewrited, owing to the effects of the internal bus and the instruction queue buffer.
Example 1:Using the NOP instruction to keep the program waiting until the interrupt control
Example 2:Using the dummy read to keep the FSET instruction waiting
Example 3:Using the POPC instruction to changing the I flag
Initialize the watchdog timer after the watchdog timer interrupt occurs.
•
•
Jan 10, 2006
interrupt may occur. Otherwise, disable the interrupt before rewriting the interrupt control register.
instruction to be used.
Changing any bit other than the IR bit
Changing the IR bit
Depending on the instruction used, the IR bit may not always be cleared to “0” (interrupt not requested).
Therefore, be sure to use the MOV instruction to clear the IR bit.
the I flag. (Refer to (b) for details about rewrite the interrupt control registers in the sample program
fragments.)
INT_SWITCH1:
The number of NOP instruction is as follows.
INT_SWITCH2:
INT_SWITCH3:
Rewrite the Interrupt Control Register
Watchdog Timer Interrupt
FCLR
AND.B
NOP
NOP
FSET
PM20=1(1 wait) : 2, PM20=0(2 wait) : 3, when using HOLD function : 4.
FCLR
AND.B
MOV.W
FSET
PUSHC
FCLR
AND.B
POPC
register is modified
I
#00h, 0055h
I
I
#00h, 0055h
MEM, R0
I
FLG
I
#00h, 0055h
FLG
Page 368 of 390
; Disable interrupts.
; Set the TA0IC register to “00h”.
;
; Enable interrupts.
; Disable interrupts.
; Set the TA0IC register to “00h”.
; Dummy read.
; Enable interrupts.
; Disable interrupts.
; Set the TA0IC register to “00h”.
; Enable interrupts.
24. Precautions
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