DF2398TE20V Renesas Electronics America, DF2398TE20V Datasheet - Page 106
DF2398TE20V
Manufacturer Part Number
DF2398TE20V
Description
IC H8S MCU FLASH 256K 120TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Specifications of DF2398TE20V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
87
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
120-TQFP, 120-VQFP
For Use With
YR0K42378FC000BA - KIT EVAL FOR H8S/2378
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
HD64F2398TE20V
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2398TE20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Section 2 Instruction Descriptions
2.2.22
CLRMAC (CLeaR MAC register)
Operation
0
Assembly-Language Format
CLRMAC
Operand Size
—
Description
This instruction simultaneously clears registers MACH and MACL.
It is supported only by the H8S/2600 CPU.
Operand Format and Number of States Required for Execution
Note: * A maximum of three additional states are required for execution of this instruction within three states
Notes
Execution of this instruction also clears the overflow flag in the multiplier to 0.
Rev. 4.00 Feb 24, 2006 page 90 of 322
REJ09B0139-0400
Addressing
MACH, MACL
Mode
—
after execution of a MAC instruction. For example, if there is a one-state instruction (such as NOP)
between the MAC instruction and this instruction, this instruction will be two states longer.
The number of states may differ depending on the product. For details, refer to the relevant
microcontroller hardware manual of the product in question.
CLRMAC
Mnemonic
CLRMAC
Operands
—
1st byte
0
1
Condition Code
H: Previous value remains unchanged.
N: Previous value remains unchanged.
Z: Previous value remains unchanged.
V: Previous value remains unchanged.
C: Previous value remains unchanged.
2nd byte
A
Instruction Format
Initialize Multiply-Accumulate Register
—
I
0
UI H
—
—
3rd byte
—
U
—
N
4th byte
—
Z
— —
V
States
No. of
C
2*
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