M30626FHPGP#U9C Renesas Electronics America, M30626FHPGP#U9C Datasheet - Page 8
![IC M16C MCU FLASH 384K 100LQFP](/photos/12/21/122180/m30626fhpgp_u9c_sml.jpg)
M30626FHPGP#U9C
Manufacturer Part Number
M30626FHPGP#U9C
Description
IC M16C MCU FLASH 384K 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/60r
Datasheets
1.QSK-62P_PLUS.pdf
(103 pages)
2.M30622SAFPU5.pdf
(308 pages)
3.M30620SPGPU3C.pdf
(423 pages)
Specifications of M30626FHPGP#U9C
Core Processor
M16C/60
Core Size
16-Bit
Speed
24MHz
Connectivity
I²C, IEBus, UART/USART
Peripherals
DMA, WDT
Number Of I /o
85
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
31K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-LQFP
Cpu Family
M16C
Device Core Size
16/32Bit
Frequency (max)
24MHz
Interface Type
I2C/IEBus/UART
Total Internal Ram Size
31KB
# I/os (max)
87
Number Of Timers - General Purpose
11
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
3V
On-chip Adc
26-chx10-bit
On-chip Dac
2-chx8-bit
Instruction Set Architecture
CISC
Operating Temp Range
-20C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
100
Package Type
LQFP
Package
100LQFP
Family Name
M16C
Maximum Speed
24 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
16|32 Bit
Number Of Programmable I/os
87
Number Of Timers
11
For Use With
867-1000 - KIT QUICK START RENESAS 62PR0K33062PS001BE - R0K33062P STARTER KITR0K33062PS000BE - KIT EVAL STARTER FOR M16C/62PM3062PT3-CPE-3 - EMULATOR COMPACT M16C/62P/30P
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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6.
7.
8.
9.
5.2
5.3
5.4
5.5
5.6
6.1
6.2
6.3
6.4
7.1
7.2
8.1
8.2
9.1
9.2
Voltage Detection Circuit
Processor Mode
Bus
Memory Space Expansion Function
8.1.1
8.1.2
8.2.1
8.2.2
8.2.3
8.2.4
8.2.5
8.2.6
8.2.7
8.2.8
8.2.9
8.2.10
9.2.1
9.2.2
Brown-out Detection Reset (Hardware Reset 2) .......................................42
Software Reset..........................................................................................43
Oscillation Stop Detection Reset...............................................................43
Internal Space ...........................................................................................44
Low Voltage Detection Interrupt ................................................................49
Limitations on Exiting Wait Mode ..............................................................51
Cold Start-up / Warm Start-up Determine Function ..................................52
Types of Processor Mode .........................................................................54
Setting Processor Modes ..........................................................................55
Bus Mode ..................................................................................................59
Bus Control................................................................................................60
1-Mbyte Mode ...........................................................................................72
4-Mbyte Mode ...........................................................................................72
Watchdog Timer Reset.............................................................................43
Limitations on Exiting Stop Mode .............................................................51
Chip Select Signal ..............................................................................60
Read and Write Signals......................................................................63
9.2.2 Addresses 40000h to BFFFFh ..................................................72
Separate Bus......................................................................................59
Multiplexed Bus ..................................................................................59
Address Bus .......................................................................................60
Data Bus.............................................................................................60
ALE Signal..........................................................................................63
RDY Signal .........................................................................................64
HOLD Signal.......................................................................................65
8.2.8 BCLK Output .............................................................................65
Software Wait .....................................................................................68
9.2.1 Addresses 04000h to 3FFFFh, C0000h to FFFFFh ..................72
External Bus Status When Internal Area Accessed ..........................67
A - 2
45
54
59
72
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