M30626FHPGP#U7C Renesas Electronics America, M30626FHPGP#U7C Datasheet - Page 23

• Manufacturer Part Number: M30626FHPGP#U7C
• Description: IC M16C MCU FLASH 384K 100LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/60r

Specifications of M30626FHPGP#U7C

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 24MHz
• Connectivity: I²C, IEBus, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 85
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Ram Size: 31K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Package: 100LQFP
• Family Name: M16C
• Maximum Speed: 24 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16|32 Bit
• Number Of Programmable I/os: 87
• Interface Type: I2C/IEBus/UART
• On-chip Adc: 26-chx10-bit
• On-chip Dac: 2-chx8-bit
• Number Of Timers: 11
• Cpu Family: M16C
• Device Core Size: 16/32Bit
• Frequency (max): 24MHz
• Total Internal Ram Size: 31KB
• # I/os (max): 87
• Number Of Timers - General Purpose: 11
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 3V
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 100
• Package Type: LQFP
• For Use With: 867-1000 - KIT QUICK START RENESAS 62PM3062PT3-CPE-3 - EMULATOR COMPACT M16C/62P/30P
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Chapter 1 Overview
1.3.2 Address registers (A0 and A1)
1.3.3 Frame base register (FB)
1.3.4 Program counter (PC)
1.3.5 Interrupt table register (INTB)
1.3.6 User stack pointer (USP) and interrupt stack pointer (ISP)
1.3.7 Static base register (SB)
1.3.8 Flag register (FLG)
The address registers (A0 and A1) consist of 16 bits, and have the similar functions as the data regis-
ters. These registers are used for address register-based indirect addressing and address register-
based relative addressing.
For some instructions, registers A1 and A0 can be combined to configure a 32-bit address register
(A1A0).
The frame base register (FB) consists of 16 bits, and is used for FB-based relative addressing.
The program counter (PC) consists of 20 bits, indicating the address of an instruction to be executed
next.
The interrupt table register (INTB) consists of 20 bits, indicating the initial address of an interrupt vector
table.
There are two types of stack pointers: user stack pointer (USP) and interrupt stack pointer (ISP), each
consisting of 16 bits.
The stack pointer (USP/ISP) you want can be switched by a stack pointer select flag (U flag).
The stack pointer select flag (U flag) is bit 7 of the flag register (FLG).
The static base register (SB) consists of 16 bits, and is used for SB-based relative addressing.
The flag register (FLG) consists of 11 bits, and is used as a flag, one bit for one flag. For details about
the function of each flag, see Section 1.4, “Flag Register (FLG).”
5
1.3 Register Configuration