SAF-XC866-2FRI BC Infineon Technologies, SAF-XC866-2FRI BC Datasheet - Page 23

• Manufacturer Part Number: SAF-XC866-2FRI BC
• Description: IC MCU 8BIT 8KB FLASH TSSOP-38
• Manufacturer: Infineon Technologies
• Series: XC8xxr

Specifications of SAF-XC866-2FRI BC

• Core Processor: XC800
• Core Size: 8-Bit
• Speed: 86MHz
• Connectivity: SSI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 19
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 38-TSSOP
• For Use With: MCBXC866 - BOARD EVAL FOR INFINEON XC86X
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: FX8662FRIBCXT; SAF-XC866-2FRIBC; SAF-XC866-2FRIBCINTR; SAF-XC866-2FRIBCTR; SAF-XC866-2FRIBCTR; SAFXC8662FRIBCXT; SP000210683

3.2.2
The Special Function Registers (SFRs) occupy direct internal data memory space in the
range 80
SFRs include pointers and registers that provide an interface between the CPU and the
on-chip peripherals. As the 128-SFR range is less than the total number of registers
required, address extension mechanisms are required to increase the number of
addressable SFRs. The address extension mechanisms include:
• Mapping
• Paging
3.2.2.1
Address extension is performed at the system level by mapping. The SFR area is
extended into two portions: the standard (non-mapped) SFR area and the mapped SFR
area. Each portion supports the same address range 80
of addressable SFRs to 256. The extended address range is not directly controlled by
the CPU instruction itself, but is derived from bit RMAP in the system control register
SYSCON0 at address 8F
SYSCON0 must be set. Alternatively, the SFRs in the standard area can be accessed
by clearing bit RMAP. The SFR area can be selected as shown in
SYSCON0
System Control Register 0
Field
RMAP
1
0
Data Sheet
7
H
to FF
Special Function Register
Address Extension by Mapping
6
H
. All registers, except the program counter, reside in the SFR area. The
Bits
0
2
1,[7:3]
0
H
r
5
. To access SFRs in the mapped area, bit RMAP in SFR
Type Description
rw
rw
r
Special Function Register Map Control
0
1
Reserved
Returns the last value if read; should be written
with 1.
Reserved
Returns 0 if read; should be written with 0.
4
The access to the standard SFR area is
enabled.
The access to the mapped SFR area is
enabled.
19
3
H
rw
2
1
to FF
Functional Description
H
, bringing the number
Figure
Reset Value: 00
1
0
r
8.
V1.2, 2007-10
RMAP
XC866
rw
0
H