SAF-XC164CM-4F20F AA Infineon Technologies, SAF-XC164CM-4F20F AA Datasheet - Page 26

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SAF-XC164CM-4F20F AA

Manufacturer Part Number
SAF-XC164CM-4F20F AA
Description
IC MCU 16BIT FLASH TQFP-64-8
Manufacturer
Infineon Technologies
Series
XC16xr
Datasheet

Specifications of SAF-XC164CM-4F20F AA

Core Processor
C166SV2
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SPI, UART/USART
Peripherals
PWM, WDT
Number Of I /o
47
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 2.7 V
Data Converters
A/D 14x8/10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LFQFP
For Use With
B158-H8961-X-X-7600IN - KIT EASY XC164CMXC164CMUCANIN - KIT U-CAN STARTER XC164CMMCBX167-NET - BOARD EVAL INFINEON CAN/ETHRNTMCBXC167-BASIC - BOARD EVAL BASIC INFINEON XC16X
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
FX164CM4F20FAAXT
SAF-XC164CM-4F20FAA
SAF-XC164CM-4F20FAAINTR
SAF-XC164CM-4F20FAATR
SAF-XC164CM-4F20FAATR
SAFXC164CM4F20FAAXT
SP000084408
The XC164CM also provides an excellent mechanism to identify and to process
exceptions or error conditions that arise during run-time, so-called ‘Hardware Traps’.
Hardware traps cause immediate non-maskable system reaction which is similar to a
standard interrupt service (branching to a dedicated vector table location). The
occurrence of a hardware trap is additionally signified by an individual bit in the trap flag
register (TFR). Except when another higher prioritized trap service is in progress, a
hardware trap will interrupt any actual program execution. In turn, hardware trap services
can normally not be interrupted by standard or PEC interrupts.
Table 5
time:
Table 5
Exception Condition
Reset Functions:
Class A Hardware Traps:
Class B Hardware Traps:
Reserved
Software Traps
1) Register VECSEG defines the segment where the vector table is located to.
Data Sheet
Bitfield VECSC in register CPUCON1 defines the distance between two adjacent vectors. This table
represents the default setting, with a distance of 4 (two words) between two vectors.
Hardware Reset
Software Reset
W-dog Timer Overflow
Non-Maskable Interrupt
Stack Overflow
Stack Underflow
Software Break
Undefined Opcode
PMI Access Error
Protected Instruction
Fault
Illegal Word Operand
Access
TRAP Instruction
shows all of the possible exceptions or error conditions that can arise during run-
Hardware Trap Summary
Trap
Flag
NMI
STKOF
STKUF
SOFTBRK
UNDOPC
PACER
PRTFLT
ILLOPA
Trap
Vector
RESET
RESET
RESET
NMITRAP
STOTRAP
STUTRAP
SBRKTRAP
BTRAP
BTRAP
BTRAP
BTRAP
24
Vector
Location
xx’0000
xx’0000
xx’0000
xx’0008
xx’0010
xx’0018
xx’0020
xx’0028
xx’0028
xx’0028
xx’0028
[2C
Any
[xx’0000
xx’01FC
in steps of
4
H
H
- 3C
Functional Description
H
H
H
H
H
H
H
H
H
H
H
H
H
1)
]
H
-
] [0B
Trap
Number
00
00
00
02
04
06
08
0A
0A
0A
0A
0F
Any
[00
7F
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
]
]
-
-
Derivatives
V1.4, 2007-03
XC164CM
Trap
Priority
III
III
III
II
II
II
II
I
I
I
I
Current
CPU
Priority

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