AT89C51CC03C-SLRIM Atmel, AT89C51CC03C-SLRIM Datasheet - Page 157
AT89C51CC03C-SLRIM
Manufacturer Part Number
AT89C51CC03C-SLRIM
Description
IC 8051 MCU FLASH 64K 44PLCC
Manufacturer
Atmel
Series
AT89C CANr
Datasheets
1.AT89C51CC03C-S3RIM.pdf
(198 pages)
2.AT89C51CC03C-S3RIM.pdf
(32 pages)
3.AT89C51CC03C-S3RIM.pdf
(27 pages)
4.AT89C51CC03C-S3RIM.pdf
(184 pages)
Specifications of AT89C51CC03C-SLRIM
Core Processor
8051
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
36
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
AT89C51CC03CSLRTR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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Registers
4182O–CAN–09/08
Table 103. ADCF Register
ADCF (S:F6h)
ADC Configuration
Reset Value =0000 0000b
Table 104. ADCON Register
ADCON (S:F3h)
ADC Control Register
Reset Value =X000 0000b
Number
Number
CH 7
Bit
Bit
7-0
2-0
7
7
-
7
6
5
4
3
Mnemonic Description
Mnemonic Description
PSIDLE
PSIDLE
ADEOC
SCH2:0
ADSST
CH 0:7
ADEN
CH 6
Bit
Bit
6
6
-
Channel Configuration
Set to use P1.x as ADC input.
Clear to use P1.x as standart I/O port.
Pseudo Idle Mode (Best Precision)
Set to put in idle mode during conversion
Clear to convert without idle mode.
Enable/Standby Mode
Set to enable ADC
Clear for Standby mode (power dissipation 1 uW).
End Of Conversion
Set by hardware when ADC result is ready to be read. This flag can generate an
interrupt.
Must be cleared by software.
Start and Status
Set to start an A/D conversion.
Cleared by hardware after completion of the conversion
Selection of Channel to Convert
see Table 102
ADEN
CH 5
5
5
ADEOC
CH 4
4
4
ADSST
CH 3
3
3
SCH2
CH 2
AT89C51CC03
2
2
SCH1
CH 1
1
1
SCH0
CH 0
0
0
157
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