PIC12F508-I/MC Microchip Technology, PIC12F508-I/MC Datasheet - Page 4

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PIC12F508-I/MC

Manufacturer Part Number
PIC12F508-I/MC
Description
IC PIC MCU FLASH 512X12 8DFN
Manufacturer
Microchip Technology
Series
PIC® 12Fr

Specifications of PIC12F508-I/MC

Core Size
8-Bit
Program Memory Size
768B (512 x 12)
Core Processor
PIC
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Type
FLASH
Ram Size
25 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
8-DFN
Controller Family/series
PIC12
No. Of I/o's
6
Ram Memory Size
25Byte
Cpu Speed
4MHz
No. Of Timers
1
Digital Ic Case Style
DFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164334 - MODULE SOCKET FOR 8L 2X3MM DFNAC162059 - HEADER INTRFC MPLAB ICD2 8/14PINDVA12XP080 - ADAPTER DEVICE FOR MPLAB-ICE
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
PIC12F508/509
3.1.2.1
After receiving this command, the chip will load in a
14-bit “data word” when 16 cycles are applied, as
described previously. Because this is a 12-bit core, the
two MSbs of the data word are ignored. A timing
diagram for the Load Data command is shown in
Figure 3-1.
FIGURE 3-2:
3.1.2.2
After receiving this command, the chip will transmit
data bits out of the program memory (user or
configuration) currently addressed, starting with the
second rising edge of the clock input. The data pin will
go into Output mode on the second rising clock edge,
and it will revert to Input mode (high-impedance) after
the 16th rising edge. Because this is a 12-bit core, the
two MSbs of the 14-bit word will be read as ‘0’s.
If the program memory is code-protected (CP = 0),
portions of the program memory will be read as zeros.
See Section 5.0 “Code Protection” for details.
FIGURE 3-3:
DS41227E-page 4
ICSPCLK
ICSPDAT
ICSPCLK
ICSPDAT
Load Data For Program Memory
Read Data From Program Memory
1
1
LOAD DATA COMMAND (PROGRAM/VERIFY)
READ DATA FROM PROGRAM MEMORY COMMAND
0
0
1
T
SET
2
0
1
2
1
1
T
3
SET
T
0
3
HLD
input
1
T
1
HLD
4
0
0
4
1
5
5
x
x
Preliminary
T
6
DLY
x
6
x
T
T
1
T
DLY
DLY
DLY
2
2
1
1
strt_bit
1
strt_bit
2
2
LSb
LSb
T
3
T
SET
DLY
3
-+
T
1
3
HLD
4
1
4
output
© 2007 Microchip Technology Inc.
5
5
15
MSb
15
16
MSb
stp_bit
16
stp_bit
input

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