PIC12F508-I/SN Microchip Technology, PIC12F508-I/SN Datasheet

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PIC12F508-I/SN

Manufacturer Part Number
PIC12F508-I/SN
Description
IC MCU FLASH 512X12 8SOIC
Manufacturer
Microchip Technology
Series
PIC® 12Fr

Specifications of PIC12F508-I/SN

Program Memory Type
FLASH
Program Memory Size
768B (512 x 12)
Package / Case
8-SOIC (3.9mm Width)
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
5
Ram Size
25 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC12F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
25 B
Interface Type
RS- 232/USB
Maximum Clock Frequency
4 MHz
Number Of Programmable I/os
6
Number Of Timers
1
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DV164101, DM163014, DV164120, DM163029
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162059 - HEADER INTRFC MPLAB ICD2 8/14PIN
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC12F508-I/SN
Manufacturer:
MICROCHIP
Quantity:
13 000
Part Number:
PIC12F508-I/SN
Manufacturer:
Microchip Technology
Quantity:
75 450
Part Number:
PIC12F508-I/SN
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Company:
Part Number:
PIC12F508-I/SN
Quantity:
10 000
PIC12F508/509/16F505
Data Sheet
8/14-Pin, 8-Bit Flash Microcontrollers
© 2009 Microchip Technology Inc.
DS41236E

Related parts for PIC12F508-I/SN

PIC12F508-I/SN Summary of contents

Page 1

... Flash Microcontrollers © 2009 Microchip Technology Inc. PIC12F508/509/16F505 Data Sheet DS41236E ...

Page 2

... REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, UniWinDriver, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...

Page 3

... Wide Operating Voltage Range: 2.0V to 5.5V • Wide Temperature Range: - Industrial: -40°C to +85°C - Extended: -40°C to +125°C Peripheral Features (PIC12F508/509): • 6 I/O Pins I/O pins with individual direction control - 1 input only pin - High current sink/source for direct LED drive ...

Page 4

... PIC12F508/509/16F505 Pin Diagrams PDIP, SOIC, TSSOP RB5/OSC1/CLKIN RB4/OSC2/CLKOUT 12 RB3/MCLR RC5/T0CKI 6 9 RC4 RC3 8 7 DFN V DD GP5/OSC1/CLKIN GP4/OSC2 GP3/MCLR/V PP PIC16F505 16-Pin Diagram (QFN) RB5/OSC1/CLKIN RB4/OSC2/CLKOUT RB3/MCLR/V RC5/TOCKI DS41236E-page 4 PDIP, SOIC, MSOP RB0/ICSPDAT GP5/OSC1/CLKIN RB1/ICSPCLK GP4/OSC2 RB2 GP3/MCLR/V PP RC0 RC1 RC2 GP0/ICSPDAT ...

Page 5

... Program Memory Device Flash (words) PIC12F508 PIC12F509 PIC16F505 © 2009 Microchip Technology Inc. PIC12F508/509/16F505 Data Memory SRAM (bytes) 512 25 1024 41 1024 72 Timers I/O 8-bit DS41236E-page 5 ...

Page 6

... PIC12F508/509/16F505 Table of Contents 1.0 General Description...................................................................................................................................................................... 7 2.0 PIC12F508/509/16F505 Device Varieties ................................................................................................................................... 9 3.0 Architectural Overview ............................................................................................................................................................... 11 4.0 Memory Organization ................................................................................................................................................................. 17 5.0 I/O Port ....................................................................................................................................................................................... 31 6.0 Timer0 Module and TMR0 Register ........................................................................................................................................... 35 7.0 Special Features Of The CPU .................................................................................................................................................... 41 8.0 Instruction Set Summary ............................................................................................................................................................ 57 9.0 Development Support................................................................................................................................................................. 65 10.0 Electrical Characteristics ............................................................................................................................................................ 69 11.0 DC and AC Characteristics Graphs and Charts ......................................................................................................................... 81 12 ...

Page 7

... Packages The PIC12F508/509/16F505 devices have Power-on Reset, selectable Watchdog Timer, selectable code-protect, high I/O current capability and precision internal oscillator. The PIC12F508/509/16F505 devices use serial programming with data pin RB0/GP0 and clock pin RB1/GP1. © 2009 Microchip Technology Inc. PIC12F508/509/16F505 1.1 ...

Page 8

... PIC12F508/509/16F505 NOTES: DS41236E-page 8 © 2009 Microchip Technology Inc. ...

Page 9

... A variety of packaging options are available. Depend- ing on application and production requirements, the proper device option can be selected using the information in this section. When placing orders, please use the PIC12F508/509/16F505 Product Identification System at the back of this data sheet to specify the correct part number. 2.1 ...

Page 10

... PIC12F508/509/16F505 NOTES: DS41236E-page 10 © 2009 Microchip Technology Inc. ...

Page 11

... The PIC12F508/509/16F505 devices can directly or indirectly address its register files and data memory. All Special Function Registers (SFR), including the PC, are mapped in the data memory. The PIC12F508/509/ 16F505 devices have a highly orthogonal (symmetri- cal) instruction set that makes it possible to carry out any operation, on any register, using any addressing mode. This symmetrical nature and lack of “ ...

Page 12

... PIC12F508/509/16F505 FIGURE 3-1: PIC12F508/509 BLOCK DIAGRAM 12 Flash 512 1024 x 12 Program Memory Program 12 Bus Instruction Reg 8 Instruction Decode and Control Timing OSC1/CLKIN Generation OSC2 Internal RC OSC MCLR DS41236E-page 12 8 Data Bus Program Counter RAM Stack 1 Stack 2 File Registers RAM Addr 9 Addr MUX ...

Page 13

... TABLE 3-2: PIC12F508/509 PINOUT DESCRIPTION Input Name Function Type GP0/ICSPDAT GP0 ICSPDAT GP1/ICSPCLK GP1 ICSPCLK GP2/T0CKI GP2 T0CKI GP3/MCLR/V GP3 PP MCLR V PP GP4/OSC2 GP4 OSC2 GP5/OSC1/CLKIN GP5 OSC1 XTAL CLKIN Legend Input Output, I/O = Input/Output Power, — = Not used, TTL = TTL input Schmitt Trigger input High Voltage © ...

Page 14

... PIC12F508/509/16F505 FIGURE 3-2: PIC16F505 BLOCK DIAGRAM 12 Program Counter Flash Program Memory Program 12 Bus Instruction Reg Direct Addr 8 Device Reset Instruction Decode and Control Timing OSC1/CLKIN Generation OSC2/CLKOUT MCLR DS41236E-page 14 8 Data Bus RAM Stack 1 File Stack 2 Registers RAM Addr 9 Addr MUX ...

Page 15

... SS SS Legend Input Output, I/O = Input/Output Power, — = Not used, TTL = TTL input Schmitt Trigger input High Voltage © 2009 Microchip Technology Inc. PIC12F508/509/16F505 Output Type TTL CMOS Bidirectional I/O pin. Can be software programmed for internal weak pull-up and wake-up from Sleep on pin change. ...

Page 16

... PIC12F508/509/16F505 3.1 Clocking Scheme/Instruction Cycle The clock input (OSC1/CLKIN pin) is internally divided by four to generate four non-overlapping quadrature clocks, namely Q1, Q2, Q3 and Q4. Internally, the PC is incremented every Q1 and the instruction is fetched from program memory and latched into the instruction register in Q4 decoded and executed during the following Q1 through Q4 ...

Page 17

... Figure 4-1). Accessing a location above these boundaries will cause a wrap-around within the first 512 x 12 space (PIC12F508 space (PIC12F509). The effective Reset vector is a 0000h (see Figure 4-1). Location 01FFh (PIC12F508) and location 03FFh (PIC12F509) contain the internal clock oscillator calibration value. This value should never be overwritten. © ...

Page 18

... The General Purpose Registers are used for data and control information under command of the instructions. For the PIC12F508/509, the register file is composed of 7 Special Function Registers, 9 General Purpose Registers and General Purpose Registers accessed by banking (see Figure 4-3 and Figure 4-4). ...

Page 19

... FIGURE 4-3: PIC12F508 REGISTER FILE MAP File Address (1) INDF 00h TMR0 01h PCL 02h STATUS 03h FSR 04h OSCCAL 05h GPIO 06h 07h General Purpose Registers 1Fh Note 1: Not a physical register. See Section 4.9 “Indirect Data Addressing: INDF and FSR Registers”. ...

Page 20

... Other (non Power-up) Resets include external Reset through MCLR, Watchdog Timer and wake-up on pin change Reset Reset was due to wake-up on pin change, then bit All other Resets will cause bit PIC12F509 only. 5: This bit is used on the PIC12F509. For code compatibility do not use this bit on the PIC12F508. DS41236E-page 20 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 ...

Page 21

... If Reset was due to wake-up on pin change, then bit All other Resets will cause bit Other (non Power-up) Resets include external reset through MCLR, Watchdog Timer and wake-up on pin change Reset. © 2009 Microchip Technology Inc. PIC12F508/509/16F505 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 ...

Page 22

... A carry occurred carry did not occur Note 1: This bit is used on the PIC12F509. For code compatibility do not use this bit on the PIC12F508. DS41236E-page 22 For example, CLRF STATUS, will clear the upper three bits and set the Z bit. This leaves the STATUS register as 000u u1uu (where u = unchanged) ...

Page 23

... A borrow from the 4th low-order bit of the result occurred bit 0 C: Carry/Borrow bit (for ADDWF, SUBWF and RRF, RLF instructions) ADDWF carry occurred carry did not occur borrow occurred © 2009 Microchip Technology Inc. PIC12F508/509/16F505 R-1 R-1 R/W Unimplemented bit, read as ‘0’ ...

Page 24

... Timer0/WDT prescaler and Timer0. By executing the OPTION instruction, the contents of the W register will be transferred to the OPTION regis- ter. A Reset sets the OPTION<7:0> bits. REGISTER 4-3: OPTION REGISTER (PIC12F508/509) W-1 W-1 W-1 GPWU GPPU T0CS ...

Page 25

... PS<2:0>: Prescaler Rate Select bits Bit Value Timer0 Rate WDT Rate 000 001 010 011 100 101 110 111 © 2009 Microchip Technology Inc. PIC12F508/509/16F505 W-1 W-1 T0SE PSA U = Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared /4 OSC ...

Page 26

... PIC12F508/509/16F505 4.6 OSCCAL Register The Oscillator Calibration (OSCCAL) register is used to calibrate the internal precision 4 MHz oscillator contains seven bits for calibration Note: Erasing the device will also erase the pre- programmed internal calibration value for the internal oscillator. The calibration value must be read prior to erasing the part so it can be reprogrammed correctly later ...

Page 27

... Stack The PIC12F508/509/16F505 devices have a 2-deep, 12-bit wide hardware PUSH/POP stack. A CALL instruction will PUSH the current value of Stack 1 into Stack 2 and then PUSH the current PC value, incremented by one, into Stack Level 1 ...

Page 28

... INDF register to indirectly address the data memory area. The FSR<4:0> bits are used to select data memory addresses 00h to 1Fh. PIC12F508 – Does not use banking. FSR <7:5> are unimplemented and read as ‘1’s. PIC12F509 – Uses FSR<5>. Selects between bank 0 and bank 1. FSR<7:6> are unimplemented, read as ‘ ...

Page 29

... Direct Addressing (FSR (opcode) Bank Select Location Select 00h Data 0Fh (1) Memory 10h Note 1: For register map detail, see Section 4.3 “Data Memory Organization”. © 2009 Microchip Technology Inc. PIC12F508/509/16F505 Addresses map back to addresses in Bank 0. 1Fh 3Fh 5Fh 7Fh Bank 0 Bank 1 ...

Page 30

... PIC12F508/509/16F505 NOTES: DS41236E-page 30 © 2009 Microchip Technology Inc. ...

Page 31

... Input/Output modes. On Reset, all I/O ports are defined as input (inputs are at high-impedance) since the I/O control registers are all set. Note: On the PIC12F508/509, I/O PORTB is ref- erenced as GPIO. On the PIC16F505, I/O PORTB is referenced as PORTB. 5.1 PORTB/GPIO PORTB/GPIO is an 8-bit I/O register. Only the low- order 6 bits are used (RB/GP< ...

Page 32

... Legend: Shaded cells are not used by Port registers, read as ‘0’. – = unimplemented, read as ‘0’ unknown unchanged depends on condition. Note 1: PIC12F508/509 only. 2: PIC16F505 only Reset was due to wake-up on pin change, then bit All other Resets will cause bit DS41236E-page 32 ...

Page 33

... Instruction Fetched MOVWF PORTB MOVF PORTB, W RB<5:0> Port pin written here Instruction Executed MOVWF PORTB (Write to PORTB) © 2009 Microchip Technology Inc. PIC12F508/509/16F505 EXAMPLE 5-1: ;Initial PORTB Settings ;PORTB<5:3> Inputs ;PORTB<2:0> Outputs ; ; ; BCF PORTB, 5 ;--01 -ppp BCF PORTB, 4 ;--10 -ppp MOVLW 007h ...

Page 34

... PIC12F508/509/16F505 NOTES: DS41236E-page 34 © 2009 Microchip Technology Inc. ...

Page 35

... Timer0 Instruction Executed © 2009 Microchip Technology Inc. PIC12F508/509/16F505 Counter mode is selected by setting the T0CS bit (OPTION<5>). In this mode, Timer0 will increment either on every rising or falling edge of pin T0CKI. The T0SE bit (OPTION<4>) determines the source edge. Clearing the T0SE bit selects the rising edge. Restric- tions on the external clock input are discussed in detail in Section 6.1 “ ...

Page 36

... RBPU (1), (3) N/A TRISGPIO — (2), (3) N/A TRISC — Legend: Shaded cells are not used by Timer0. – = unimplemented unknown unchanged. Note 1: PIC12F508/509 only. 2: PIC16F505 only. 3: The TRIS of the T0CKI pin is overridden when T0CS = 1. DS41236E-page NT0 Write TMR0 Read TMR0 Read TMR0 ...

Page 37

... External clock if no prescaler selected; prescaler output otherwise. 3: The arrows indicate the points in time where sampling occurs. © 2009 Microchip Technology Inc. PIC12F508/509/16F505 When a prescaler is used, the external clock input is divided by the asynchronous ripple counter-type prescaler, so that the prescaler output is symmetrical. ...

Page 38

... PIC12F508/509/16F505 6.2 Prescaler An 8-bit counter is available as a prescaler for the Timer0 module postscaler for the Watchdog Timer (WDT), respectively (see Section 7.6 “Watch- dog Timer (WDT)”). For simplicity, this counter is being referred to as “prescaler” throughout this data sheet. Note: The prescaler may be used by either the Timer0 module or the WDT, but not both ...

Page 39

... OSC (GP2/RC5)/T0CKI pin T0SE Watchdog Timer PSA WDT Enable bit Note 1: T0CS, T0SE, PSA, PS<2:0> are bits in the OPTION register. 2: T0CKI is shared with pin RC5 on the PIC16F505 and pin GP2 on the PIC12F508/509. © 2009 Microchip Technology Inc. PIC12F508/509/16F505 Sync Cycles ...

Page 40

... PIC12F508/509/16F505 NOTES: DS41236E-page 40 © 2009 Microchip Technology Inc. ...

Page 41

... Configuration bits can be programmed to select various device configurations. Three bits are for the selection of the oscillator type; (two bits on the PIC12F508/509), one bit is the Watchdog Timer enable bit, one bit is the MCLR enable bit and one bit is for code protection (Register 7-1, Register 7-2) ...

Page 42

... FOSC<1:0>: Oscillator Selection bits 11 = EXTRC = external RC oscillator 10 = INTRC = internal RC oscillator oscillator oscillator Note 1: Refer to the “PIC12F508/509 Memory Programming Specifications” (DS41227) to determine how to access the Configuration Word. The Configuration Word is not user addressable during device operation. DS41236E-page 42 (1) — — — ...

Page 43

... HS oscillator 001 = XT oscillator 000 = LP oscillator Refer to the “PIC16F505 Memory Programming Specifications” (DS41226) to determine how to access Note 1: the Configuration Word. The Configuration Word is not user addressable during device operation. © 2009 Microchip Technology Inc. PIC12F508/509/16F505 (1) — — MCLRE CP WDTE U = Unimplemented bit, read as ‘0’ ...

Page 44

... In HS (PIC16F505 modes, a crystal or ceramic resonator is connected to the (GP5/RB5)/ OSC1/(CLKIN) and (GP4/RB4)/OSC2/(CLKOUT) pins to establish oscillation (Figure 7-1). The PIC12F508/ 509/16F505 oscillator designs require the use of a parallel cut crystal. Use of a series cut crystal may give a frequency out of the crystal manufacturers specifications ...

Page 45

... The user also needs to take into account EXT variation due to tolerance of external R and C components used. Figure 7-5 shows how the R/C combination is connected to the PIC12F508/509/16F505 devices. For R values below 3.0 kΩ, the oscillator operation may EXT become unstable, or stop completely. For very high R values (e.g., 1 MΩ ...

Page 46

... DD value must be read prior to erasing the part so it can be reprogrammed correctly later. For the PIC12F508/509/16F505 devices, only bits <7:1> of OSCCAL are implemented. Bits CAL6-CAL0 are used for calibration. Adjusting CAL6-CAL0 from ‘0000000’ to ‘1111111’ changes the clock speed. See Register 4-5 for more information. ...

Page 47

... MCLR Reset during normal operation • MCLR Reset during Sleep • WDT time-out Reset during normal operation • WDT time-out Reset during Sleep • Wake-up from Sleep on pin change TABLE 7-3: RESET CONDITIONS FOR REGISTERS – PIC12F508/509 Register Address W — INDF ...

Page 48

... PIC12F508/509/16F505 TABLE 7-4: RESET CONDITIONS FOR REGISTERS – PIC16F505 Register Address W — INDF 00h TMR0 01h PC 02h STATUS 03h FSR 04h OSCCAL 05h PORTB 06h PORTC 07h OPTION — TRISB — TRISC — Legend unchanged unknown, – = unimplemented bit, read as ‘0’ value depends on condition. ...

Page 49

... MCLR SELECT GPWU/RBWU (GP3/RB3)/MCLR/V MCLRE 7.4 Power-on Reset (POR) The PIC12F508/509/16F505 devices incorporate an on-chip Power-on Reset (POR) circuitry, which provides an internal chip Reset for most power-up situations. The on-chip POR circuit holds the chip in Reset until V has reached a high enough level for proper DD operation ...

Page 50

... PIC12F508/509/16F505 FIGURE 7-7: SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT V DD Power-up Detect (GP3/RB3)/MCLR/V PP MCLRE WDT Reset WDT Time-out Pin Change Sleep Wake-up on pin Change Reset FIGURE 7-8: TIME-OUT SEQUENCE ON POWER-UP (MCLR PULLED LOW MCLR Internal POR DRT Time-out Internal Reset ...

Page 51

... MCLR Internal POR DRT Time-out Internal Reset Note: When V rises slowly, the T DD value. In this example, the chip will reset properly if, and only if, V1 ≥ V © 2009 Microchip Technology Inc. PIC12F508/509/16F505 V1 TDRT time-out expires long before V DRT DD ): SLOW V RISE DD DD has reached its final min ...

Page 52

... PIC12F508/509/16F505 7.5 Device Reset Timer (DRT) On the PIC12F508/509/16F505 devices, the DRT runs any time the device is powered up. DRT runs from Reset and varies based on oscillator selection and Reset type (see Table 7-6). The DRT operates on an internal RC oscillator. The processor is kept in Reset as long as the DRT is active. ...

Page 53

... Bit 7 Bit 6 (1) N/A OPTION GPWU GPPU T0CS (2) N/A OPTION RBWU RBPU Legend: Shaded boxes = Not used by Watchdog Timer. – = unimplemented, read as ‘0’ unchanged. Note 1: PIC12F508/509 only. 2: PIC16F505 only. © 2009 Microchip Technology Inc. PIC12F508/509/16F505 0 M Postscaler Postscaler 8-to-1 MUX ...

Page 54

... A brown-out is a condition where device power (V dips below its minimum value, but not to zero, and then recovers. The device should be reset in the event of a brown-out. To reset PIC12F508/509/16F505 devices when a brown-out occurs, external brown-out protection circuits may be built, as shown in Figure 7-12 and Figure 7-13. ...

Page 55

... The first 64 locations and the last location (OSCCAL) can be read, regardless of the code protection bit setting. The last memory location can be read regardless of the code protection bit setting on the PIC12F508/509/ 16F505 devices. 7.11 ID Locations Four memory locations are designated as ID locations where the user can store checksum or other code identification numbers ...

Page 56

... PIC12F508/509/16F505 FIGURE 7-15: TYPICAL IN-CIRCUIT SERIAL PROGRAMMING CONNECTION To Normal Connections External Connector Signals + MCLR/V PP GP1/RB1 CLK Data I/O GP0/RB0 Normal Connections DS41236E-page 56 PIC16F505 PIC12F508 PIC12F509 PP © 2009 Microchip Technology Inc. ...

Page 57

... In the set of User defined term (font is courier) italics © 2009 Microchip Technology Inc. PIC12F508/509/16F505 All instructions are executed within a single instruction cycle, unless a conditional test is true or the program counter is changed as a result of an instruction. In this case, the execution takes two instruction cycles. One instruction cycle consists of four oscillator periods ...

Page 58

... PIC12F508/509/16F505 TABLE 8-2: INSTRUCTION SET SUMMARY Mnemonic, Description Operands ADDWF f, d Add W and f ANDWF f, d AND W with f CLRF f Clear f CLRW — Clear W COMF f, d Complement f DECF f, d Decrement f DECFSZ f, d Decrement f, Skip if 0 INCF f, d Increment f INCFSZ f, d Increment f, Skip if 0 IORWF ...

Page 59

... The contents of the W register are AND’ed with register ‘f’. If ‘d’ is ‘0’, the result is stored in the W register. If ‘d’ is ‘1’, the result is stored back in register ‘f’. © 2009 Microchip Technology Inc. PIC12F508/509/16F505 BCF Bit Clear f Syntax: [ label ] BCF 0 ≤ f ≤ 31 Operands: 0 ≤ ...

Page 60

... PIC12F508/509/16F505 BTFSS Bit Test f, Skip if Set Syntax: [ label ] BTFSS f,b 0 ≤ f ≤ 31 Operands: 0 ≤ b < 7 Operation: skip if (f<b> Status Affected: None Description: If bit ‘b’ in register ‘f’ is ‘1’, then the next instruction is skipped. If bit ‘b’ is ‘1’, then the next instruc- ...

Page 61

... Description: GOTO is an unconditional branch. The 9-bit immediate value is loaded into PC bits <8:0>. The upper bits of PC are loaded from STATUS<6:5>. GOTO is a two- cycle instruction. © 2009 Microchip Technology Inc. PIC12F508/509/16F505 INCF Increment f Syntax: [ label ] INCF f,d 0 ≤ f ≤ 31 Operands: d ∈ ...

Page 62

... PIC12F508/509/16F505 IORWF Inclusive OR W with f Syntax: [ label ] IORWF f,d 0 ≤ f ≤ 31 Operands: d ∈ [0,1] (W).OR. (f) → (dest) Operation: Status Affected: Z Description: Inclusive OR the W register with register ‘f’. If ‘d’ is ‘0’, the result is placed in the W register. If ‘d’ is ‘1’, the result is placed back in register ‘ ...

Page 63

... Carry flag. If ‘d’ is ‘0’, the result is placed in the W register. If ‘d’ is ‘1’, the result is placed back in register ‘f’. register ‘f’ C © 2009 Microchip Technology Inc. PIC12F508/509/16F505 SLEEP Syntax: Operands: Operation: Status Affected: TO, PD, RBWUF Description: ...

Page 64

... PIC12F508/509/16F505 TRIS Load TRIS Register Syntax: [ label ] TRIS f Operands (W) → TRIS register f Operation: Status Affected: None Description: TRIS register ‘f’ loaded with the contents of the W register XORLW Exclusive OR literal with W Syntax: [label ] XORLW k 0 ≤ k ≤ 255 Operands: (W) .XOR. k → (W) ...

Page 65

... MPLAB PM3 Device Programmer - PICkit™ 2 Development Programmer • Low-Cost Demonstration and Development Boards and Evaluation Kits © 2009 Microchip Technology Inc. PIC12F508/509/16F505 9.1 MPLAB Integrated Development Environment Software The MPLAB IDE software brings an ease of software development previously unseen in the 8/16-bit micro- controller market ...

Page 66

... PIC12F508/509/16F505 9.2 MPASM Assembler The MPASM Assembler is a full-featured, universal macro assembler for all PIC MCUs. The MPASM Assembler generates relocatable object files for the MPLINK Object Linker, Intel files, MAP files to detail memory usage and symbol reference, absolute LST files that contain source lines and generated machine code and COFF files for debugging ...

Page 67

... Microchip Technology Inc. PIC12F508/509/16F505 9.9 MPLAB ICD 2 In-Circuit Debugger Microchip’s In-Circuit Debugger, MPLAB ICD powerful, low-cost, connecting to the host PC via an RS-232 or high-speed USB interface ...

Page 68

... PIC12F508/509/16F505 9.11 PICSTART Plus Development Programmer The PICSTART Plus Development Programmer is an easy-to-use, low-cost, prototype programmer. It connects to the PC via a COM (RS-232) port. MPLAB Integrated Development Environment software makes using the programmer simple and efficient. The PICSTART Plus Development Programmer supports most PIC devices in DIP packages pins. ...

Page 69

... This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. © 2009 Microchip Technology Inc. PIC12F508/509/16F505 ............................................................................... -0. )...................................................................................................................± ...........................................................................................................± ...

Page 70

... PIC12F508/509/16F505 PIC12F508/509/16F505 VOLTAGE-FREQUENCY GRAPH, -40°C ≤ T FIGURE 10-1: 6.0 5.5 5.0 4 (Volts) 4.0 3.5 3.0 2.5 2.0 0 FIGURE 10-2: MAXIMUM OSCILLATOR FREQUENCY TABLE LP XT INTOSC EXTRC ( 200 kHz Note 1: For PIC16F505 only. DS41236E-page 70 (PIC16F505 only Frequency (MHz) 4 MHz Frequency (MHz) ≤ ...

Page 71

... DC Characteristics: PIC12F508/509/16F505 (Industrial) DC Characteristics Param Sym. Characteristic No. D001 V Supply Voltage DD D002 V RAM Data Retention Voltage DR D003 V V Start Voltage to ensure POR DD Power-on Reset D004 S V Rise Rate to ensure VDD DD Power-on Reset (3,4) D010 I Supply Current DD D020 I Power-down Current PD (5) D022 ...

Page 72

... PIC12F508/509/16F505 10.2 DC Characteristics: PIC12F508/509/16F505 (Extended) DC Characteristics Param Sym. Characteristic No. D001 V Supply Voltage DD D002 V RAM Data Retention Voltage DR D003 V V Start Voltage to ensure POR DD Power-on Reset D004 S V Rise Rate to ensure VDD DD Power-on Reset (3,4) D010 I Supply Current DD D020 I Power-down Current PD (5) ...

Page 73

... Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. Note 1: In EXTRC oscillator configuration, the OSC1/CLKIN pin is a Schmitt Trigger input not recommended that the PIC12F508/509/ 16F505 be driven with external clock in RC mode. 2: The leakage current on the MCLR pin is strongly dependent on the applied voltage level ...

Page 74

... PIC12F508/509/16F505 TABLE 10-2: PULL-UP RESISTOR RANGES – PIC12F508/509/16F505 V (Volts) Temperature (°C) DD GP0(RBO)/GP1(RB1) 2.0 – 125 5.5 – 125 GP3(RB3) 2.0 – 125 5.5 – 125 * These parameters are characterized but not tested. DS41236E-page 74 Min. Typ. 73K 105K 73K 113K 82K ...

Page 75

... Timing Parameter Symbology and Load Conditions – PIC12F508/509/16F505 The timing parameter symbols have been created following one of the following formats: 1. TppS2ppS 2. TppS T F Frequency Lowercase subscripts (pp) and their meanings CLKOUT cy Cycle time drt Device Reset Timer io I/O port Uppercase letters and their meanings: ...

Page 76

... PIC12F508/509/16F505 TABLE 10-3: EXTERNAL CLOCK TIMING REQUIREMENTS – PIC12F508/509/16F505 AC CHARACTERISTICS Param Sym. Characteristic No External CLKIN Frequency OSC Oscillator Frequency 1 T External CLKIN Period OSC (2) Oscillator Period 2 T Instruction Cycle Time CY 3 TosL, Clock in (OSC1) Low or High TosH Time 4 TosR, Clock in (OSC1) Rise or Fall ...

Page 77

... TABLE 10-4: CALIBRATED INTERNAL RC FREQUENCIES – PIC12F508/509/16F505 AC CHARACTERISTICS Param Sym. Characteristic No. F10 F Internal Calibrated OSC INTOSC Frequency * These parameters are characterized but not tested. † Data in the Typical (“Typ”) column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested ...

Page 78

... PIC12F508/509/16F505 TABLE 10-5: TIMING REQUIREMENTS – PIC12F508/509/16F505 Standard Operating Conditions (unless otherwise specified) AC Operating Temperature CHARACTERISTICS Operating Voltage V Param Sym. No OSC1↑ (Q1 cycle) to Port Out Valid OSC1↑ (Q2 cycle) to Port Input Invalid (I/O in hold time Port Input Valid to OSC1↑ (I/O in setup time) ...

Page 79

... TABLE 10-6: RESET, WATCHDOG TIMER AND DEVICE RESET TIMER – PIC12F508/509/16F505 AC CHARACTERISTICS Param Sym. Characteristic No MCLR Pulse Width (low Watchdog Timer Time-out Period WDT (no prescaler Device Reset Timer Period DRT 34 T I/O High-impedance from MCLR IOZ low * These parameters are characterized but not tested. ...

Page 80

... PIC12F508/509/16F505 FIGURE 10-7: TIMER0 CLOCK TIMINGS – PIC12F508/509/16F505 T0CKI TABLE 10-7: TIMER0 CLOCK REQUIREMENTS – PIC12F508/509/16F505 AC CHARACTERISTICS Param Sym. Characteristic No. 40 Tt0H T0CKI High Pulse Width 41 Tt0L T0CKI Low Pulse Width 42 Tt0P T0CKI Period * These parameters are characterized but not tested. ...

Page 81

... DD DD 1,400 Typical: Statistical Mean @25°C 1,200 Maximum: Mean (Worst-Case Temp) + 3σ (-40°C to 125°C) 1,000 800 600 400 200 0 2.0 2.5 © 2009 Microchip Technology Inc. PIC12F508/509/16F505 = 4 MHz OSC 4 MHz 4 MHz 3.0 3.5 4.0 V (V) DD Maximum Typical 4.5 5.0 5.5 ...

Page 82

... PIC12F508/509/16F505 FIGURE 11- Over OSC 3.00 Typical: Statistical Mean @25°C Maximum: Mean (Worst-Case Temp) + 3σ (-40°C to 125°C) 2.50 2.00 1.50 1.00 0.50 0.00 5 FIGURE 11-3: TYPICAL I PD 0.45 Typical: Statistical Mean @25°C 0.40 Maximum: Mean (Worst-Case Temp) + 3σ (-40°C to 125°C) ...

Page 83

... Typical: Statistical Mean @25°C Maximum: Mean (Worst-Case Temp) + 3σ 7 (-40°C to 125° 2.0 2.5 © 2009 Microchip Technology Inc. PIC12F508/509/16F505 vs. V (SLEEP MODE, ALL PERIPHERALS DISABLED) DD Maximum (Sleep Mode all Peripherals Disabled) Max. 125°C Max. 85°C 3.0 3.5 4 ...

Page 84

... PIC12F508/509/16F505 FIGURE 11-6: MAXIMUM WDT I 25.0 Typical: Statistical Mean @25°C Maximum: Mean (Worst-Case Temp) + 3σ (-40°C to 125°C) 20.0 15.0 10.0 5.0 0.0 2.0 2.5 FIGURE 11-7: WDT TIME-OUT or DEVICE RESET TIMER vs. V WDT PRESCALER) 50 Max. 125° Max. 85° Typical. 25°C ...

Page 85

... Maximum: Mean (Worst-Case Temp) + 3σ Maximum: Meas + 3 (-40°C to 125°C) 0.35 0.30 0.25 0.20 0.15 0.10 0.05 0.00 5.0 5.5 6.0 © 2009 Microchip Technology Inc. PIC12F508/509/16F505 = 3.0V) DD (VDD = 3V, -40×C TO 125×C) Typical 25°C Min. -40°C 6.5 7.0 7.5 8.0 I (mA 5.0V) DD (-40× ...

Page 86

... PIC12F508/509/16F505 FIGURE 11-10: V vs. I OVER TEMPERATURE ( 3.5 3.0 2.5 2.0 1.5 Typical: Statistical Mean @25°C Maximum: Mean (Worst-Case Temp) + 3σ 1.0 (-40°C to 125°C) 0.5 0.0 0.0 -0.5 -1.0 FIGURE 11-11: V vs. I OVER TEMPERATURE ( 5.5 5.0 4.5 4.0 Typical: Statistical Mean @25°C 3.5 Maximum: Mean (Worst-Case Temp) + 3σ ...

Page 87

... Typical: Statistical Mean @25°C 3.5 Maximum: Mean (Worst-Case Temp) + 3σ (-40°C to 125°C) 3.0 2.5 2.0 1.5 1.0 0.5 2.0 2.5 © 2009 Microchip Technology Inc. PIC12F508/509/16F505 vs (TTL Input, -40×C TO 125×C) Max. -40°C Typ. 25°C Min. 125°C 3.0 3.5 4 ...

Page 88

... PIC12F508/509/16F505 FIGURE 11-14: TYPICAL INTOSC FREQUENCY CHANGE 2.5 2.5 2 FIGURE 11-15: TYPICAL INTOSC FREQUENCY CHANGE 2.5 2.5 2 DS41236E-page 3.5 4 4.5 3 3.5 4 4 3.5 4 4.5 3 3.5 4 4.5 V (V) DD (25°C) 5 5.5 (-40°C) 5 5.5 5 5.5 © 2009 Microchip Technology Inc. ...

Page 89

... FIGURE 11-16: TYPICAL INTOSC FREQUENCY CHANGE 2.5 2.5 2 FIGURE 11-17: TYPICAL INTOSC FREQUENCY CHANGE 2.5 2.5 2 © 2009 Microchip Technology Inc. PIC12F508/509/16F505 DD 3 3.5 4 4.5 3 3.5 4 4 4.5 4.5 3 3.5 V (V) DD (85°C) 5 5.5 5.5 5 (125° 5.5 5.5 DS41236E-page 89 ...

Page 90

... PIC12F508/509/16F505 NOTES: DS41236E-page 90 © 2009 Microchip Technology Inc. ...

Page 91

... Microchip part number, year code, week code, and traceability code. For PIC device marking beyond this, certain price adders apply. Please check with your Microchip Sales Office. For QTP devices, any special marking adders are included in QTP price. © 2009 Microchip Technology Inc. PIC12F508/509/16F505 Example 12F508-I e ...

Page 92

... SOIC (3.90 mm) XXXXXXXXXXX XXXXXXXXXXX YYWWNNN 14-Lead TSSOP (4.4 mm) XXXXXXXX YYWW NNN 16-Lead QFN XXXXXXX XXXXXXX YYWWNNN TABLE 12-1: 8-LEAD 2X3 DFN (MC) TOP MARKING Part Number PIC12F508 (T) - I/MC PIC12F508-E/MC PIC12F509 (T) - I/MC PIC12F509-E/MC DS41236E-page 92 Example PIC16F505 e -I/P 3 0215 0610017 Example PIC16F505-E /SL0125 ...

Page 93

... N NOTE © 2009 Microchip Technology Inc. PIC12F508/509/16F505 DS41236E-page 93 ...

Page 94

... PIC12F508/509/16F505 N NOTE DS41236E-page φ α c β © 2009 Microchip Technology Inc. ...

Page 95

... Microchip Technology Inc. PIC12F508/509/16F505 DS41236E-page 95 ...

Page 96

... PIC12F508/509/16F505 D N NOTE DS41236E-page φ L © 2009 Microchip Technology Inc. ...

Page 97

... D N NOTE TOP VIEW A3 © 2009 Microchip Technology Inc. PIC12F508/509/16F505 EXPOSED PAD BOTTOM VIEW A NOTE NOTE DS41236E-page 97 ...

Page 98

... PIC12F508/509/16F505 N NOTE DS41236E-page © 2009 Microchip Technology Inc. ...

Page 99

... N NOTE © 2009 Microchip Technology Inc. PIC12F508/509/16F505 φ α c β DS41236E-page 99 ...

Page 100

... PIC12F508/509/16F505 D N NOTE DS41236E-page 100 © 2009 Microchip Technology Inc. φ L ...

Page 101

... Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging © 2009 Microchip Technology Inc. PIC12F508/509/16F505 DS41236E-page 101 ...

Page 102

... PIC12F508/509/16F505 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS41236E-page 102 © 2009 Microchip Technology Inc. ...

Page 103

... Note 5, Table 10-1; Deleted Param. No. D061 (Table 10-1) and Param. No. D061A becomes D061; Added QFN Package Information; Revised Product Identification System; Added Figures 11-14, 11-15, 11- 16, 11-7 to Char Data section; Other minor corrections; Removed Preliminary status. © 2009 Microchip Technology Inc. PIC12F508/509/16F505 DS41236E-page 103 ...

Page 104

... PIC12F508/509/16F505 NOTES: DS41236E-page 104 © 2009 Microchip Technology Inc. ...

Page 105

... MPLINK Object Linker/MPLIB Object Librarian .................. 66 O Option Register................................................................... 24 OSC selection..................................................................... 41 OSCCAL Register............................................................... 26 Oscillator Configurations..................................................... 44 Oscillator Types HS............................................................................... 44 LP ............................................................................... 44 RC .............................................................................. 44 XT ............................................................................... 44 P PIC12F508/509/16F505 Device Varieties ............................ 9 PICSTART Plus Development Programmer....................... 68 POR Device Reset Timer (DRT) ................................... 41, 52 PD......................................................................... 54, 41 TO............................................................................... 54 PORTB ............................................................................... 31 Power-down Mode.............................................................. 55 Prescaler ............................................................................ 38 Program Counter ................................................................ cycles .............................................................................. Oscillator ...

Page 106

... PIC12F508/509/16F505 W Wake-up from Sleep ........................................................... 55 Watchdog Timer (WDT) ................................................ 41, 52 Period.......................................................................... 52 Programming Considerations ..................................... 52 WWW Address.................................................................. 107 WWW, On-Line Support........................................................ 6 Z Zero bit ................................................................................ 11 DS41236E-page 106 © 2009 Microchip Technology Inc. ...

Page 107

... To register, access the Microchip web site at www.microchip.com, click on Customer Change Notification and follow the registration instructions. © 2009 Microchip Technology Inc. PIC12F508/509/16F505 CUSTOMER SUPPORT Users of Microchip products can receive assistance through several channels: • Distributor or Representative • ...

Page 108

... Telephone: (_______) _________ - _________ Application (optional): Would you like a reply? Y Device: PIC12F508/509/16F505 Questions: 1. What are the best features of this document? 2. How does this document meet your hardware and software development needs you find the organization of this document easy to follow? If not, why? 4 ...

Page 109

... Tape and Reel available for only the following packages: SOIC, MSOP and TSSOP. © 2009 Microchip Technology Inc. PIC12F508/509/16F505 XXX Examples: Pattern a) PIC12F508-E/P 301 = Extended Temp., PDIP package, QTP pattern #301 b) PIC12F508-I/SN = Industrial Temp., SOIC package c) PIC12F508T-E/P = Extended Temp., PDIP package, Tape and Reel (3, 4) (3, 4) (4) Note 1: (4) (4) ...

Page 110

... Fax: 886-3-6578-370 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 © 2009 Microchip Technology Inc. EUROPE Austria - Wels Tel: 43-7242-2244-39 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 France - Paris Tel: 33-1-69-53-63-20 ...

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