PIC16F526-I/P Microchip Technology, PIC16F526-I/P Datasheet - Page 31

• Manufacturer Part Number: PIC16F526-I/P
• Description: IC PIC MCU FLASH 1KX12 14DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F526-I/P

• Program Memory Type: FLASH
• Program Memory Size: 1.5KB (1K x 12)
• Package / Case: 14-DIP (0.300", 7.62mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: POR, WDT
• Number Of I /o: 11
• Ram Size: 67 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 3x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 67 B
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 12
• Number Of Timers: 1
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 3 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162096 - HEADER MPLAB ICD2 PIC16F526 8/14
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

FIGURE 6-4:
 2010 Microchip Technology Inc.
Data
Bus
WR
Port
W
Reg
TRIS ‘f’
Note 1:
Pin Change
RD Port
2: Input mode is disabled when pin is used for
3: Pin is not used for oscillator.
INTOSC/RC/EC
(Note 3)
I/O pins have protection diodes to V
D
D
oscillator.
CK
CK
Reset
TRIS
Latch
Data
Latch
CLKOUT Enable
RBPU
F
OSC
Q
Q
Q
Q
BLOCK DIAGRAM OF RB4
(with Weak Pull-up and
Wake-up on Change)
/4
OSC1
0
1
Q
Oscillator
Circuit
CK
(Note 2)
D
DD
and V
I/O
pin
SS
(1)
.
FIGURE 6-5:
Data
Bus
WR
Port
W
Reg
TRIS ‘f’
Note 1:
2:
D
D
I/O pins have protection diodes to V
V
Input mode is disabled when pin is used for
oscillator.
CK
CK
OSC2
SS
Reset
TRIS
Latch
Data
Latch
.
RD Port
Oscillator
Q
Q
Q
Q
Circuit
BLOCK DIAGRAM OF RB5
PIC16F526
DS41326E-page 31
(Note 2)
DD
I/O
pin
and
(1)