PIC12F675-E/SN Microchip Technology, PIC12F675-E/SN Datasheet - Page 10
![no-image](/images/manufacturer_photos/0/4/439/microchip_technology_sml.jpg)
PIC12F675-E/SN
Manufacturer Part Number
PIC12F675-E/SN
Description
IC MCU CMOS 1K FLASH W/AD 8-SOIC
Manufacturer
Microchip Technology
Series
PIC® 12Fr
Datasheets
1.PIC12F629T-ISN.pdf
(136 pages)
2.PIC12F629T-ISN.pdf
(8 pages)
3.PIC12F629T-ISN.pdf
(24 pages)
4.PIC12F675-ESN.pdf
(132 pages)
Specifications of PIC12F675-E/SN
Program Memory Type
FLASH
Program Memory Size
1.75KB (1K x 14)
Package / Case
8-SOIC (3.9mm Width)
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
POR, WDT
Number Of I /o
5
Eeprom Size
128 x 8
Ram Size
64 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Processor Series
PIC12F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
64 B
Interface Type
RS- 232/USB
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
6
Number Of Timers
2
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 53270-913
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
Minimum Operating Temperature
- 40 C
On-chip Adc
4-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Connectivity
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
PIC12F629/675
2.2.2
The Special Function registers are registers used by
the CPU and peripheral functions for controlling the
desired operation of the device (see Table 2-1). These
registers are static RAM.
The special registers can be classified into two sets:
core and peripheral. The Special Function registers
associated with the “core” are described in this section.
Those related to the operation of the peripheral
features are described in the section of that peripheral
feature.
DS41190C-page 8
SPECIAL FUNCTION REGISTERS
FIGURE 2-2:
1: Not a physical register.
2: PIC12F675 only.
Indirect addr.
ADRESH
ADCON0
Unimplemented data memory locations, read as '0'.
STATUS
PCLATH
Registers
INTCON
CMCON
64 Bytes
Purpose
TMR1H
T1CON
General
TMR1L
Bank 0
TMR0
GPIO
PIR1
FSR
PCL
(2)
(2)
(1)
Address
File
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
1Ah
1Bh
1Ch
1Dh
1Eh
1Fh
20h
5Fh
60h
7Fh
DATA MEMORY MAP OF
THE PIC12F629/675
2003 Microchip Technology Inc.
Indirect addr.
OPTION_REG
EECON2
ADRESL
ANSEL
OSCCAL
EECON1
accesses
EEDATA
STATUS
PCLATH
INTCON
20h-5Fh
VRCON
TRISIO
EEADR
Bank 1
PCON
WPU
PIE1
FSR
PCL
IOC
(2)
(2)
(1)
(1)
Address
File
80h
81h
82h
83h
84h
85h
86h
87h
88h
89h
8Ah
8Bh
8Ch
8Dh
8Eh
8Fh
90h
91h
92h
93h
94h
95h
96h
97h
98h
99h
9Ah
9Bh
9Ch
9Dh
9Eh
9Fh
A0h
DFh
E0h
FFh