PIC12F675-E/SN Microchip Technology, PIC12F675-E/SN Datasheet - Page 57
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PIC12F675-E/SN
Manufacturer Part Number
PIC12F675-E/SN
Description
IC MCU CMOS 1K FLASH W/AD 8-SOIC
Manufacturer
Microchip Technology
Series
PIC® 12Fr
Datasheets
1.PIC12F629T-ISN.pdf
(136 pages)
2.PIC12F629T-ISN.pdf
(8 pages)
3.PIC12F629T-ISN.pdf
(24 pages)
4.PIC12F675-ESN.pdf
(132 pages)
Specifications of PIC12F675-E/SN
Program Memory Type
FLASH
Program Memory Size
1.75KB (1K x 14)
Package / Case
8-SOIC (3.9mm Width)
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
POR, WDT
Number Of I /o
5
Eeprom Size
128 x 8
Ram Size
64 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Processor Series
PIC12F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
64 B
Interface Type
RS- 232/USB
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
6
Number Of Timers
2
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 53270-913
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
Minimum Operating Temperature
- 40 C
On-chip Adc
4-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Connectivity
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
9.3
The PIC12F629/675 differentiates between various
kinds of RESET:
a)
b)
c)
d)
e)
f)
Some registers are not affected in any RESET
condition; their status is unknown on POR and
unchanged in any other RESET. Most other registers
are reset to a “RESET state” on:
• Power-on Reset
• MCLR Reset
• WDT Reset
• WDT Reset during SLEEP
• Brown-out Detect (BOD) Reset
FIGURE 9-4:
2003 Microchip Technology Inc.
V
OSC1/
MCLR/
CLKIN
Note
PP
V
pin
Power-on Reset (POR)
WDT Reset during normal operation
WDT Reset during SLEEP
MCLR Reset during normal operation
MCLR Reset during SLEEP
Brown-out Detect (BOD)
DD
pin
RESET
1:
On-chip
RC OSC
OST/PWRT
This is a separate oscillator from the INTOSC/EC oscillator.
Brown-out
V
Module
Detect
DD
WDT
Detect
(1)
Rise
OST
PWRT
SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT
10-bit Ripple Counter
10-bit Ripple Counter
Time-out
Reset
WDT
BODEN
Power-on Reset
External
Reset
SLEEP
Enable PWRT
Enable OST
They are not affected by a WDT wake-up, since this is
viewed as the resumption of normal operation. TO and
PD bits are set or cleared differently in different RESET
situations as indicated in Table 9-4. These bits are
used in software to determine the nature of the RESET.
See Table 9-7 for a full description of RESET states of
all registers.
A simplified block diagram of the On-Chip Reset Circuit
is shown in Figure 9-4.
The MCLR Reset path has a noise filter to detect and
ignore small pulses. See Table 12-4 in Electrical
Specifications Section for pulse width specification.
See Table 9-3 for time-out situations.
PIC12F629/675
S
R
DS41190C-page 55
Q
Q
Chip_Reset