ATTINY25-20SSU Atmel, ATTINY25-20SSU Datasheet - Page 151
ATTINY25-20SSU
Manufacturer Part Number
ATTINY25-20SSU
Description
MCU AVR 2K ISP FLASH 2.7V 8-SOIC
Manufacturer
Atmel
Series
AVR® ATtinyr
Specifications of ATTINY25-20SSU
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
6
Program Memory Size
2KB (1K x 16)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (3.9mm Width)
Processor Series
ATTINY2x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
USI
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
6
Number Of Timers
2
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
4-ch x 10-bit
Package
8SOIC W
Device Core
AVR
Family Name
ATtiny
Maximum Speed
20 MHz
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32ATAVRBC100 - REF DESIGN KIT BATTERY CHARGER770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATTINY25-20SSU
Manufacturer:
IDT
Quantity:
1 001
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20. Memory Programming
20.1
2586M–AVR–07/10
Program And Data Memory Lock Bits
This section describes the different methods for Programming the ATtiny25/45/85 memories.
ATtiny25/45/85 provides two Lock bits which can be left unprogrammed (“1”) or can be pro-
grammed (“0”) to obtain the additional security listed in
“1” with the Chip Erase command, only.
Program memory can be read out via the debugWIRE interface when the DWEN fuse is pro-
grammed, even if the Lock Bits are set. Thus, when Lock Bit security is required debugWIRE
should always be disabled (by clearing the DWEN fuse).
Table 20-1.
Note:
Table 20-2.
Notes:
Lock bits can also be read by device firmware. See section
Data from Software” on page
LB Mode
1
2
3
Lock Bit
1. “1” means unprogrammed, “0” means programmed
1. Program the Fuse bits before programming the LB1 and LB2.
2. “1” means unprogrammed, “0” means programmed
Memory Lock Bits
LB2
LB1
Lock Bit Byte
Lock Bit Protection Modes
LB2
1
1
0
(1)
LB1
147.
1
0
0
Bit No
7
6
5
4
3
2
1
0
Protection Type
No memory lock features enabled.
Further programming of the Flash and EEPROM is disabled in
High-voltage and Serial Programming mode. The Fuse bits are
locked in both Serial and High-voltage Programming mode.
debugWire is disabled.
Further programming and verification of the Flash and EEPROM
is disabled in High-voltage and Serial Programming mode. The
Fuse bits are locked in both Serial and High-voltage
Programming mode.
(1)(2)
Description
–
–
–
–
–
–
Lock bit
Lock bit
(1)
Table
debugWire is disabled.
“Reading Lock, Fuse and Signature
20-2. Lock bits can be erased to
Default Value
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
(1)
151
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