DSPIC33FJ32MC204-I/ML Microchip Technology, DSPIC33FJ32MC204-I/ML Datasheet - Page 68

• Manufacturer Part Number: DSPIC33FJ32MC204-I/ML
• Description: IC DSPIC MCU/DSP 32K 44QFN
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ32MC204-I/ML

• Program Memory Type: FLASH
• Program Memory Size: 32KB (32K x 8)
• Package / Case: 44-QFN
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 35
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 9x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Product: DSCs
• Data Bus Width: 16 bit
• Processor Series: DSPIC33F
• Core: dsPIC
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 35
• Data Ram Size: 2 KB
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DM240002, DM330011, DM330021, MA330017
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304
TABLE 6-2:
6.2
A Power-on Reset (POR) circuit ensures the device is
reset from power-on. The POR circuit is active until
V
has elapsed. The delay T
device bias circuits become stable.
The device supply voltage characteristics must meet
the
requirements
Section 24.0 “Electrical Characteristics” for details.
The POR status (POR) bit in the Reset Control
(RCON<0>) register is set to indicate the Power-on
Reset.
DS70283G-page 68
V
T
V
T
T
T
DD
POR
BOR
PWRT
FSCM
POR
BOR
Note:
crosses the V
specified
Power-on Reset (POR)
When the device exits the Reset
condition (begins normal operation), the
device operating parameters (voltage,
frequency, temperature, etc.) must be
within their operating ranges, otherwise
the device may not function correctly.
The user application must ensure that
the delay between the time power is
first applied, and the time SYSRST
becomes inactive, is long enough to get
all
specification.
Symbol
to
starting
OSCILLATOR DELAY
operating
POR
generate the POR. Refer to
threshold and the delay T
voltage
POR
parameters
ensures the internal
POR threshold
POR extension time
BOR threshold
BOR extension time
Programmable power-up time delay
Fail-Safe Clock Monitor Delay
and
rise
within
POR
rate
Parameter
Preliminary
6.2.1
The on-chip regulator has a Brown-out Reset (BOR)
circuit that resets the device when the V
(V
circuit keeps the device in Reset until V
V
delay T
becomes stable.
The BOR status (BOR) bit in the Reset Control
(RCON<1>) register is set to indicate the Brown-out
Reset.
The device will not run at full speed after a BOR as the
V
operation. The PWRT provides power-up time delay
(T
stabilized at the appropriate levels for full-speed
operation before the SYSRST is released.
The power-up timer delay (T
the
(FPWRT<2:0>)
(FPOR<2:0>) register, which provides eight settings
(from 0 ms to 128 ms). Refer to Section 21.0 “Special
Features” for further details.
Figure 6-3 shows the typical brown-out scenarios. The
reset delay (T
rises above the V
BOR
DD
PWRT
DD
should rise to acceptable levels for full-speed
< V
threshold and the delay T
Power-on
) to ensure that the system power supplies have
BOR
BOR
Brown-out Reset (BOR) and
Power-up timer (PWRT)
1.8V nominal
30 s maximum
2.5V nominal
100 s maximum
0-128 ms nominal
900 s maximum
) for proper device operation. The BOR
ensures the voltage regulator output
BOR
BOR
bits
+ T
Reset
PWRT
trip point
in
 2009 Microchip Technology Inc.
) is initiated each time V
the
PWRT
Timer
Value
BOR
POR
) is programmed by
has elapsed. The
Value
Configuration
DD
DD
is too low
crosses
Select
DD