PIC18LF2431-I/SP Microchip Technology, PIC18LF2431-I/SP Datasheet - Page 7

IC MCU FLASH 8KX16 28-DIP

PIC18LF2431-I/SP

Manufacturer Part Number
PIC18LF2431-I/SP
Description
IC MCU FLASH 8KX16 28-DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18LF2431-I/SP

Core Size
8-Bit
Program Memory Size
16KB (8K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
Number Of I /o
24
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Controller Family/series
PIC18
No. Of I/o's
24
Eeprom Memory Size
256Byte
Ram Memory Size
768Byte
Cpu Speed
40MHz
No. Of Timers
4
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
EUSART, I2C, SPI, SSP
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
24
Number Of Timers
1 x 8
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM183021, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
5 bit
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
2.4
Figure 2-7 shows the high level overview of the pro-
gramming process. First, a bulk erase is performed.
Next, the code memory, ID locations, and data
EEPROM are programmed. These memories are then
verified to ensure that programming was successful. If
no errors are detected, the configuration bits are then
programmed and verified.
2.5
The High Voltage ICSP Program/Verify mode is
entered by holding SCLK and SDATA low and then
raising MCLR/V
mode, the code memory, data EEPROM, ID locations,
and
programmed in serial fashion.
The sequence that enters the device into the Program/
Verify mode places all unused I/Os in the high
impedance state.
2.5.1
When the LVP configuration bit is ‘1’ (see Section 5.3),
the Low Voltage ICSP mode is enabled. Low Voltage
ICSP Program/Verify mode is entered by holding SCLK
and SDATA low, placing a logic high on PGM, and then
raising MCLR/V
pin is dedicated to the programming function and
ceases to be a general purpose I/O pin.
The sequence that enters the device into the Program/
Verify mode places all unused I/Os in the high
impedance state.
FIGURE 2-6:
 2010 Microchip Technology Inc.
MCLR/V
V
SDATA
SCLK
configuration
DD
High Level Overview of the
Programming Process
Entering High Voltage ICSP
Program/Verify Mode
D110
ENTERING LOW VOLTAGE ICSP
PROGRAM/VERIFY MODE
PP
PP
PP
to V
to V
SDATA = Input
P13
bits
ENTERING HIGH
VOLTAGE PROGRAM/
VERIFY MODE
P1
IHH
IH
. In this mode, the RB5/PGM
(high voltage). Once in this
can
P12
be
accessed
PIC18F2331/2431/4331/4431
and
FIGURE 2-7:
FIGURE 2-8:
MCLR/V
V
PGM
SDATA
SCLK
DD
PP
V
IH
Program Memory
Configuration Bits
Configuration Bits
Verify Program
Program Data
V
Perform Bulk
Program IDs
SDATA = Input
Verify Data
IH
Verify IDs
P15
Program
HIGH LEVEL
PROGRAMMING FLOW
ENTERING LOW
VOLTAGE PROGRAM/
VERIFY MODE
Erase
Verify
Done
Start
P12
DS30500B-page 7

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