PIC18LF2523-I/SP Microchip Technology, PIC18LF2523-I/SP Datasheet - Page 30
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PIC18LF2523-I/SP
Manufacturer Part Number
PIC18LF2523-I/SP
Description
IC PIC MCU FLASH 16KX16 28-DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC18F2221-ISO.pdf
(46 pages)
2.PIC18F2423-ISP.pdf
(54 pages)
3.PIC18F2423-ISP.pdf
(8 pages)
4.PIC18F2423-ISP.pdf
(34 pages)
5.PIC18F2523-ISO.pdf
(392 pages)
Specifications of PIC18LF2523-I/SP
Core Size
8-Bit
Program Memory Size
32KB (16K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
25
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Controller Family/series
PIC18
No. Of I/o's
25
Eeprom Memory Size
256Byte
Ram Memory Size
1.5KB
Cpu Speed
40MHz
No. Of Timers
4
Package
28SPDIP
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Operating Supply Voltage
2.5|3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
25
Interface Type
I2C/SPI/USART
On-chip Adc
10-chx12-bit
Number Of Timers
4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC18F2423/2523/4423/4523
6.0
DS39759A-page 30
Standard Operating Conditions
Operating Temperature: 25°C is recommended
D110
D110A V
D111
D112
D113
D031
D041
D080
D090
D012
P1
P2
P2A
P2B
P3
P4
P5
P5A
P6
P9
P10
P11
Note 1:
Param
No.
2:
3:
V
V
I
I
V
V
V
V
C
T
T
T
T
T
T
T
T
T
T
T
T
PP
DDP
AC/DC CHARACTERISTICS TIMING REQUIREMENTS
FOR PROGRAM/VERIFY TEST MODE
Sym
R
PGC
PGCL
PGCH
SET
HLD
DLY
DLY
DLY
DLY
DLY
DLY
IHH
IHL
DD
IL
IH
OL
OH
IO
Do not allow excess time when transitioning MCLR between V
executions to occur. The maximum transition time is:
where T
specific values, refer to the Electrical Characteristics section of the device data sheet for the particular device.
When ICPORT = 1, this specification also applies to ICV
At 0°C-50°C.
1
1 Input Data Setup Time to Serial Clock ↓
1 Delay between 4-bit Command and Command
2 Delay between Last PGC ↓ of Command Byte to
5 PGC High Time (minimum programming time)
6 PGC Low Time after Programming
7 Delay to allow Self-Timed Data Write or
1 Input Data Hold Time from PGC ↓
A
1 T
2 ms (for HS/PLL mode only) + 1.5 μs (for EC mode only)
High-Voltage Programming Voltage on
MCLR/V
Low-Voltage Programming Voltage on
MCLR/V
Supply Voltage During Programming
Programming Current on MCLR/V
Supply Current During Programming
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage
Capacitive Loading on I/O pin (PGD)
MCLR/V
Program/Verify mode
Serial Clock (PGC) Period
Serial Clock (PGC) Low Time
Serial Clock (PGC) High Time
Operand
Delay between 4-bit Command Operand and Next
4-bit Command
First PGC ↑ of Read of Data Word
(high-voltage discharge time)
Bulk Erase to occur
CY
CY
+ T
is the instruction cycle time, T
PWRT
PP
PP
PP
/RE3
/RE3
/RE3 Rise Time to Enter
(if enabled) + 1024 T
Characteristic
OSC
PP
PWRT
/RE3
(for LP, HS, HS/PLL and XT modes only) +
is the Power-up Timer period and T
PP
V
V
0.8 V
DD
DD
.
2.00
2.00
Min
V
100
400
400
100
3.0
40
40
15
15
40
40
20
—
—
—
—
—
1
1
5
SS
+ 4.0
– 0.7
IL
DD
and V
0.2 V
Max
12.5
5.50
5.50
5.50
IHH
V
300
0.6
1.0
10
—
50
—
—
—
—
—
—
—
—
—
—
—
—
—
—
DD
; this can cause spurious program
DD
Units
mA
ms
ms
μA
pF
μs
ns
μs
ns
ns
ns
ns
ns
ns
ns
ns
ns
μs
© 2005 Microchip Technology Inc.
V
V
V
V
V
V
V
V
OSC
is the oscillator period. For
(Note 2)
(Note 2)
Externally timed,
row erases and all writes
Self-timed,
bulk erases only (Note 3)
(Note 2)
I
I
To meet AC specifications
(Note 1, 2)
V
V
V
V
V
V
Externally timed
OL
OH
DD
DD
DD
DD
DD
DD
= 8.5 mA @ 4.5V
= -3.0 mA @ 4.5V
= 5.0V
= 2.0V
= 5.0V
= 2.0V
= 5.0V
= 2.0V
Conditions