PIC18LF4331-I/ML Microchip Technology, PIC18LF4331-I/ML Datasheet - Page 110
![IC PIC MCU FLASH 4KX16 44QFN](/photos/6/81/68122/150-44-qfn_sml.jpg)
PIC18LF4331-I/ML
Manufacturer Part Number
PIC18LF4331-I/ML
Description
IC PIC MCU FLASH 4KX16 44QFN
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F818-ISO.pdf
(6 pages)
3.PIC18F2331-ISO.pdf
(392 pages)
4.PIC18F2331-ISO.pdf
(8 pages)
5.PIC18F2331-ISO.pdf
(6 pages)
6.PIC18F2331-ISO.pdf
(16 pages)
7.PIC18LF2331-ISO.pdf
(4 pages)
8.PIC18LF2331-ISO.pdf
(40 pages)
Specifications of PIC18LF4331-I/ML
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
- PIC16F616T-ISL PDF datasheet
- PIC16F818-ISO PDF datasheet #2
- PIC18F2331-ISO PDF datasheet #3
- PIC18F2331-ISO PDF datasheet #4
- PIC18F2331-ISO PDF datasheet #5
- PIC18F2331-ISO PDF datasheet #6
- PIC18LF2331-ISO PDF datasheet #7
- PIC18LF2331-ISO PDF datasheet #8
- Current page: 110 of 392
- Download datasheet (4Mb)
PIC18F2331/2431/4331/4431
REGISTER 10-12: IPR3: PERIPHERAL INTERRUPT PRIORITY REGISTER 3
DS39616D-page 110
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-5
bit 4
bit 3
bit 2
bit 1
bit 0
U-0
—
Unimplemented: Read as ‘0’
PTIP: PWM Time Base Interrupt Priority bit
1 = High priority
0 = Low priority
IC3DRIP: IC3 Interrupt Priority/Direction Change Interrupt Priority bit
IC3 Enabled (CAP3CON<3:0>):
1 = IC3 interrupt high priority
0 = IC3 interrupt low priority
QEI Enabled (QEIM<2:0>):
1 = Change of direction interrupt high priority
0 = Change of direction interrupt low priority
IC2QEIP: IC2 Interrupt Priority/QEI Interrupt Priority bit
IC2 Enabled (CAP2CON<3:0>):
1 = IC2 interrupt high priority
0 = IC2 interrupt low priority
QEI Enabled (QEIM<2:0>):
1 = High priority
0 = Low priority
IC1IP: IC1 Interrupt Priority bit
1 = High priority
0 = Low priority
TMR5IP: Timer5 Interrupt Priority bit
1 = High priority
0 = Low priority
U-0
—
W = Writable bit
‘1’ = Bit is set
U-0
—
R/W-1
PTIP
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
IC3DRIP
R/W-1
IC2QEIP
R/W-1
2010 Microchip Technology Inc.
x = Bit is unknown
R/W-1
IC1IP
TMR5IP
R/W-1
bit 0
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