PIC18LF4331-I/ML Microchip Technology, PIC18LF4331-I/ML Datasheet - Page 381
![IC PIC MCU FLASH 4KX16 44QFN](/photos/6/81/68122/150-44-qfn_sml.jpg)
PIC18LF4331-I/ML
Manufacturer Part Number
PIC18LF4331-I/ML
Description
IC PIC MCU FLASH 4KX16 44QFN
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F818-ISO.pdf
(6 pages)
3.PIC18F2331-ISO.pdf
(392 pages)
4.PIC18F2331-ISO.pdf
(8 pages)
5.PIC18F2331-ISO.pdf
(6 pages)
6.PIC18F2331-ISO.pdf
(16 pages)
7.PIC18LF2331-ISO.pdf
(4 pages)
8.PIC18LF2331-ISO.pdf
(40 pages)
Specifications of PIC18LF4331-I/ML
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
- PIC16F616T-ISL PDF datasheet
- PIC16F818-ISO PDF datasheet #2
- PIC18F2331-ISO PDF datasheet #3
- PIC18F2331-ISO PDF datasheet #4
- PIC18F2331-ISO PDF datasheet #5
- PIC18F2331-ISO PDF datasheet #6
- PIC18LF2331-ISO PDF datasheet #7
- PIC18LF2331-ISO PDF datasheet #8
- Current page: 381 of 392
- Download datasheet (4Mb)
EUSART
External Clock Input ............................................................ 31
F
Fail-Safe Clock Monitor............................................. 263, 277
Fail-Safe Clock Monitor (FSCM) ....................................... 263
Fast Register Stack............................................................. 64
Flash Program Memory ...................................................... 85
FSCM. See Fail-Safe Clock Monitor.
G
Getting Started .................................................................... 25
GOTO ............................................................................... 304
2010 Microchip Technology Inc.
Asynchronous Mode ................................................. 226
Baud Rate Generator (BRG)..................................... 221
Serial Port Enable (SPEN Bit)................................... 217
Synchronous Master Mode ....................................... 233
Synchronous Slave Mode ......................................... 237
Exiting ....................................................................... 277
Interrupts in Power-Managed Modes........................ 278
POR or Wake From Sleep ........................................ 278
WDT During Oscillator Failure .................................. 277
Associated Registers .................................................. 94
Control Registers ........................................................ 86
Erase Sequence ......................................................... 90
Erasing........................................................................ 90
Operation During Code-Protect .................................. 94
Reading....................................................................... 89
TABLAT Register ........................................................ 88
Table Pointer............................................................... 88
Table Pointer Boundaries ........................................... 88
Table Reads and Table Writes ................................... 85
Unexpected Termination of Write Operation............... 94
Write Sequence .......................................................... 92
Write Verify ................................................................. 94
Writing......................................................................... 91
Associated Registers, Receive ......................... 230
Associated Registers, Transmit ........................ 228
Auto-Wake-up on Sync Break .......................... 231
Receiver............................................................ 229
Receiving a Break Character ............................ 232
Setting Up 9-Bit Mode with Address Detect...... 229
Transmitter........................................................ 226
12-Bit Break Character Sequence .................... 232
Associated Registers ........................................ 222
Auto-Baud Rate Detect ..................................... 225
Baud Rate Error, Calculating ............................ 222
Baud Rates, Asynchronous Modes .................. 222
High Baud Rate Select (BRGH Bit) .................. 221
Power-Managed Mode Operation..................... 221
Sampling ........................................................... 221
Associated Registers, Receive ......................... 236
Associated Registers, Transmit ........................ 234
Reception.......................................................... 235
Transmission .................................................... 233
Associated Registers, Receive ......................... 238
Associated Registers, Transmit ........................ 237
Reception.......................................................... 238
Transmission .................................................... 237
EECON1 and EECON2 ...................................... 86
Boundaries Based on Operation......................... 88
PIC18F2331/2431/4331/4431
H
Hardware Multiplier............................................................. 95
I
I/O Ports ........................................................................... 113
ID Locations.............................................................. 263, 282
INCF ................................................................................. 304
INCFSZ............................................................................. 305
In-Circuit Debugger........................................................... 282
In-Circuit Serial Programming (ICSP)....................... 263, 282
Independent PWM Mode .................................................. 193
Indirect Addressing ............................................................. 76
INFSNZ............................................................................. 305
Initialization Conditions for All Registers....................... 54–59
Instruction Flow/Pipelining .................................................. 65
Instruction Set
Introduction................................................................. 95
Operation.................................................................... 95
Performance Comparison........................................... 95
Duty Cycle Assignment ............................................ 193
ADDLW..................................................................... 289
ADDWF .................................................................... 289
ADDWFC.................................................................. 290
ANDLW..................................................................... 290
ANDWF .................................................................... 291
BC............................................................................. 291
BCF .......................................................................... 292
BN............................................................................. 292
BNC .......................................................................... 293
BNN .......................................................................... 293
BNOV ....................................................................... 294
BNZ .......................................................................... 294
BOV .......................................................................... 297
BRA .......................................................................... 295
BSF........................................................................... 295
BTFSC...................................................................... 296
BTFSS ...................................................................... 296
BTG .......................................................................... 297
BZ ............................................................................. 298
CALL......................................................................... 298
CLRF ........................................................................ 299
CLRWDT .................................................................. 299
COMF ....................................................................... 300
CPFSEQ ................................................................... 300
CPFSGT ................................................................... 301
CPFSLT.................................................................... 301
DAW ......................................................................... 302
DCFSNZ ................................................................... 303
DECF........................................................................ 302
DECFSZ ................................................................... 303
General Format ........................................................ 285
GOTO ....................................................................... 304
INCF ......................................................................... 304
INCFSZ..................................................................... 305
INFSNZ..................................................................... 305
IORLW ...................................................................... 306
IORWF...................................................................... 306
LFSR ........................................................................ 307
MOVF ....................................................................... 307
MOVFF ..................................................................... 308
MOVLB ..................................................................... 308
DS39616D-page 381
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