DSPIC33FJ128MC706-I/PT Microchip Technology, DSPIC33FJ128MC706-I/PT Datasheet - Page 301
![IC DSPIC MCU/DSP 128K 64TQFP](/photos/6/81/68123/c04-066_pf_sml.jpg)
DSPIC33FJ128MC706-I/PT
Manufacturer Part Number
DSPIC33FJ128MC706-I/PT
Description
IC DSPIC MCU/DSP 128K 64TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheets
1.DSPIC33FJ12GP201-ISO.pdf
(90 pages)
2.DSPIC33FJ64MC506-IPT.pdf
(340 pages)
3.DSPIC33FJ64MC506-IPT.pdf
(30 pages)
4.DSPIC33FJ128GP706-IPT.pdf
(371 pages)
Specifications of DSPIC33FJ128MC706-I/PT
Program Memory Type
FLASH
Program Memory Size
128KB (128K x 8)
Package / Case
64-TFQFP
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
53
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Product
DSCs
Data Bus Width
16 bit
Processor Series
DSPIC33F
Core
dsPIC
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
85
Data Ram Size
16 KB
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Data Rom Size
4096 B
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MA330013 - MODULE PLUG-IN DSPIC33 100TQFPDV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32AC164327 - MODULE SKT FOR 64TQFPDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC33FJ128MC706-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- DSPIC33FJ12GP201-ISO PDF datasheet
- DSPIC33FJ64MC506-IPT PDF datasheet #2
- DSPIC33FJ64MC506-IPT PDF datasheet #3
- DSPIC33FJ128GP706-IPT PDF datasheet #4
- Current page: 301 of 371
- Download datasheet (6Mb)
dsPIC33F
All instructions are a single word, except for certain
double-word instructions, which were made double-
word instructions so that all the required information is
available in these 48 bits. In the second word, the
8 MSbs are ‘0’s. If this second word is executed as an
instruction (by itself), it will execute as a NOP.
Most single-word instructions are executed in a single
instruction cycle, unless a conditional test is true, or the
program counter is changed as a result of the instruc-
tion. In these cases, the execution takes two instruction
cycles with the additional instruction cycle(s) executed
as a NOP. Notable exceptions are the BRA (uncondi-
tional/computed branch), indirect CALL/GOTO, all table
TABLE 24-1:
DS70165D-page 298
#text
(text)
[text]
{ }
<n:m>
.b
.d
.S
.w
Acc
AWB
bit4
C, DC, N, OV, Z
Expr
f
lit1
lit4
lit5
lit8
lit10
lit14
lit16
lit23
None
OA, OB, SA, SB
PC
Slit10
Slit16
Slit6
Wb
Wd
Wdo
Wm,Wn
Field
SYMBOLS USED IN OPCODE DESCRIPTIONS
4-bit bit selection field (used in word addressed instructions)
MCU Status bits: Carry, Digit Carry, Negative, Overflow, Sticky Zero
Field does not require an entry, may be blank
DSP Status bits: AccA Overflow, AccB Overflow, AccA Saturate, AccB Saturate
Means literal defined by “text”
Means “content of text”
Means “the location addressed by text”
Optional field or operation
Register bit field
Byte mode selection
Double-Word mode selection
Shadow register select
Word mode selection (default)
One of two accumulators {A, B}
Accumulator write back destination address register
Absolute address, label or expression (resolved by the linker)
File register address
1-bit unsigned literal
4-bit unsigned literal
5-bit unsigned literal
8-bit unsigned literal
10-bit unsigned literal
14-bit unsigned literal
16-bit unsigned literal
23-bit unsigned literal
Program Counter
10-bit signed literal
16-bit signed literal
6-bit signed literal
Base W register
Destination W register
Destination W register
{ Wnd, [Wnd], [Wnd++], [Wnd--], [++Wnd], [--Wnd], [Wnd+Wb] }
Dividend, Divisor working register pair (direct addressing)
{W0..W15}
{-16...16}
Preliminary
{-512...511}
{-32768...32767}
{0,1}
{0...15}
{0...31}
{0...255}
{0x0000...0x1FFF}
{0...255} for Byte mode, {0:1023} for Word mode
{0...16384}
{0...65535}
{0...8388608}; LSb must be ‘0’
{ Wd, [Wd], [Wd++], [Wd--], [++Wd], [--Wd] }
reads and writes and RETURN/RETFIE instructions,
which are single-word instructions but take two or three
cycles. Certain instructions that involve skipping over the
subsequent instruction require either two or three cycles
if the skip is performed, depending on whether the
instruction being skipped is a single-word or two-word
instruction. Moreover, double-word moves require two
cycles. The double-word instructions execute in two
instruction cycles.
Note:
Description
For more details on the instruction set,
refer to the “dsPIC30F/33F Programmer’s
Reference Manual” (DS70157).
{W13, [W13]+ = 2}
© 2006 Microchip Technology Inc.
{0...15}
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