PIC18LF248-I/SP Microchip Technology, PIC18LF248-I/SP Datasheet - Page 244
![IC MCU CAN FLASH 8K LP 28DIP](/photos/6/59/65908/150-28-dip_sml.jpg)
PIC18LF248-I/SP
Manufacturer Part Number
PIC18LF248-I/SP
Description
IC MCU CAN FLASH 8K LP 28DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18LF242-ISO.pdf
(36 pages)
3.PIC18F248-ISO.pdf
(402 pages)
4.PIC18F248-ISO.pdf
(8 pages)
Specifications of PIC18LF248-I/SP
Core Size
8-Bit
Program Memory Size
16KB (8K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
22
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Controller Family/series
PIC18
No. Of I/o's
22
Eeprom Memory Size
256Byte
Ram Memory Size
768Byte
Cpu Speed
40MHz
No. Of Timers
4
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
- PIC16F616T-ISL PDF datasheet
- PIC18LF242-ISO PDF datasheet #2
- PIC18F248-ISO PDF datasheet #3
- PIC18F248-ISO PDF datasheet #4
- Current page: 244 of 402
- Download datasheet (7Mb)
REGISTER 20-2:
DS41159E-page 242
PIC18FXX8
bit 7
bit 6
bit 5-4
bit 3-0
ADFM: A/D Result Format Select bit
1 = Right justified. Six (6) Most Significant bits of ADRESH are read as ‘0’.
0 = Left justified. Six (6) Least Significant bits of ADRESL are read as ‘0’.
ADCS2: A/D Conversion Clock Select bit (ADCON1 bits in bold)
Unimplemented: Read as ‘0’
PCFG3:PCFG0: A/D Port Configuration Control bits
Legend:
R = Readable bit
-n = Value at POR
bit 7
ADCON1: A/D CONTROL REGISTER 1
A = Analog input D = Digital I/O
C/R = # of analog input channels/# of A/D voltage references
Note:
PCFG
<ADCS2>
0000
0001
0010
0011
0100
0101
011x
1000
1001
1010
1011
1100
1101
1110
1111
ADFM
R/W-0
ADCON1
Note:
0
0
0
0
1
1
1
1
AN7
On any device Reset, the port pins that are multiplexed with analog functions (ANx)
are forced to be analog inputs.
Shaded cells indicate channels available only on PIC18F4X8 devices.
D
D
D
D
D
D
D
D
D
D
D
D
A
A
A
ADCS2
R/W-0
<ADCS1:ADCS0>
AN6
A
A
D
D
D
D
D
A
D
D
D
D
D
D
D
ADCON0
00
01
10
11
00
01
10
11
AN5
A
A
D
D
D
D
D
A
A
A
A
D
D
D
D
W = Writable bit
‘1’ = Bit is set
U-0
—
AN4
D
D
D
D
D
D
A
A
A
A
A
A
A
A
A
F
F
F
F
F
F
F
F
OSC
OSC
OSC
RC
OSC
OSC
OSC
RC
V
V
V
V
V
V
V
V
V
U-0
(clock derived from the internal A/D RC oscillator)
(clock derived from the internal A/D RC oscillator)
AN3
—
REF
REF
REF
REF
REF
REF
REF
REF
REF
/2
/8
/32
/4
/16
/64
A
A
A
D
A
D
+
+
+
+
+
+
+
+
+
V
V
V
V
V
AN2
REF
REF
REF
REF
REF
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
A
A
A
A
D
D
D
A
A
D
PCFG3
R/W-0
-
-
-
-
-
Clock Conversion
AN1
A
A
A
A
A
A
D
A
A
A
A
A
A
D
D
PCFG2
R/W-0
AN0
D
A
A
A
A
A
A
A
A
A
A
A
A
A
A
© 2006 Microchip Technology Inc.
V
AN3
AN3
AN3
AN3
AN3
AN3
AN3
AN3
AN3
V
V
V
V
V
REF
—
x = Bit is unknown
DD
DD
DD
DD
DD
PCFG1
R/W-0
+
V
AN2
AN2
AN2
AN2
AN2
V
V
V
V
V
V
V
V
V
REF
—
SS
SS
SS
SS
SS
SS
SS
SS
SS
-
PCFG0
R/W-0
C/R
8/0
7/1
5/0
4/1
3/0
2/1
0/0
6/2
6/0
5/1
4/2
3/2
2/2
1/0
1/2
bit 0
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