PIC24HJ256GP610-I/PT Microchip Technology, PIC24HJ256GP610-I/PT Datasheet - Page 223

• Manufacturer Part Number: PIC24HJ256GP610-I/PT
• Description: IC PIC MCU FLASH 128KX16 100TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 24Hr

Specifications of PIC24HJ256GP610-I/PT

• Core Size: 16-Bit
• Program Memory Size: 256KB (85.5K x 24)
• Core Processor: PIC
• Speed: 40 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 32x10b, 32x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TFQFP
• Controller Family/series: PIC24
• No. Of I/o's: 85
• Ram Memory Size: 16KB
• Cpu Speed: 40MIPS
• No. Of Timers: 13
• No. Of Pwm Channels: 8
• Processor Series: PIC24HJ
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 16 KB
• Interface Type: CAN, I2C, SPI, UART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 85
• Number Of Timers: 13
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 2 (12 bit, 32 Channel)
• A/d Bit Size: 12 bit
• A/d Channels Available: 32
• Height: 1 mm
• Length: 12 mm
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3 V
• Width: 12 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 876-1004 - PIC24 BREAKOUT BOARDAC164333 - MODULE SKT FOR PM3 100QFPDM300024 - KIT DEMO DSPICDEM 1.1MA240012 - MODULE PLUG-IN PIC24H 100QFPDV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

20.0
PIC24H devices include several features intended to
maximize application flexibility and reliability, and mini-
mize cost through elimination of external components.
These are:
• Flexible Configuration
• Watchdog Timer (WDT)
• Code Protection
• JTAG Boundary Scan Interface
• In-Circuit Serial Programming™ (ICSP™)
• In-Circuit Emulation
20.1
The Configuration bits can be programmed (read as
‘0’), or left unprogrammed (read as ‘1’), to select vari-
ous device configurations. These bits are mapped
starting at program memory location 0xF80000.
TABLE 20-1:
© 2006 Microchip Technology Inc.
0xF8000 RESERVED1
0xF8002 RESERVED2
0xF8004 FGS
0xF8006 FOSCSEL
0xF8008 FOSC
0xF800A FWDT
0xF800C FPOR
0xF800E RESERVED3
0xF8010 FUID0
0xF8012 FUID1
0xF8014 FUID2
0xF8016 FUID3
Address
Note:
programming capability
Note 1: Reserved bits are read as ‘1’ and must be programmed as ‘1’.
2: This reserved bit is a read-only copy of the GCP bit.
3: Unimplemented bits are read as ‘0’.
SPECIAL FEATURES
Configuration Bits
This data sheet summarizes the features
of this group of PIC24H devices. It is not
intended to be a comprehensive reference
source. To complement the information in
this data sheet, refer to the “dsPIC30F
Family Reference Manual” (DS70046).
Name
DEVICE CONFIGURATION REGISTER MAP
FWDTEN
IESO
Bit 7
FCKSM<1:0>
Reserved
WINDIS
Bit 6
—
(1)
Reserved
Preliminary
TEMP
Bit 5
—
User Unit ID Byte 0
User Unit ID Byte 1
User Unit ID Byte 2
User Unit ID Byte 3
The device Configuration register map is shown in
Table 20-1.
The individual Configuration bit descriptions for the
RESERVED1, RESERVED2, FGS, FOSCSEL, FOSC,
FWDT, FPOR and RESERVED3 Configuration
registers are shown in Table 20-2.
Note that address F80000h is beyond the user program
memory space. In fact, it belongs to the configuration
memory space (0x800000-0xFFFFFF), which can only
be accessed using table reads and table writes.
The upper byte of all device Configuration registers
should always be ‘1111
appear to be NOP instructions in the remote event that
their locations are ever executed by accident. Since
Configuration bits are not implemented in the
corresponding locations, writing ‘1’s to these locations
has no effect on device operation.
To prevent inadvertent configuration changes during
code execution, all programmable Configuration bits
are write-once. After a bit is initially programmed during
a power cycle, it cannot be written to again. Changing
a device configuration requires that power to the device
be cycled.
WDTPRE
Bit 4
Reserved
Reserved
Reserved
—
—
(1)
(1)
Bit 3
OSCIOFNC POSCMD<1:0>
Reserved
WDTPOST<3:0>
Bit 2
1111’. This makes them
FNOSC<2:0>
FPWRT<2:0>
(2)
PIC24H
DS70175C-page 221
Bit 1
GCP
GWRP
Bit 0