P89LPC921FDH,512 NXP Semiconductors, P89LPC921FDH,512 Datasheet - Page 27
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P89LPC921FDH,512
Manufacturer Part Number
P89LPC921FDH,512
Description
IC 80C51 MCU FLASH 4K 20-TSSOP
Manufacturer
NXP Semiconductors
Series
LPC900r
Datasheet
1.P89LPC922FDH512.pdf
(46 pages)
Specifications of P89LPC921FDH,512
Core Processor
8051
Core Size
8-Bit
Speed
18MHz
Connectivity
I²C, UART/USART
Peripherals
Brown-out Detect/Reset, LED, POR, PWM, WDT
Number Of I /o
18
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-TSSOP
Processor Series
P89LPC9x
Core
80C51
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
I2C, UART
Maximum Clock Frequency
18 MHz
Number Of Programmable I/os
18
Number Of Timers
2
Operating Supply Voltage
2.4 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Minimum Operating Temperature
- 40 C
For Use With
622-1014 - BOARD FOR LPC9XX TSSOP622-1008 - BOARD FOR LPC9103 10-HVSON622-1006 - SOCKET ADAPTER BOARDEPM900K - EMULATOR/PROGRAMMER NXP P89LPC9568-4000 - DEMO BOARD SPI/I2C TO DUAL UART568-3510 - DEMO BOARD SPI/I2C TO UART568-1759 - EMULATOR DEBUGGER/PROGRMMR LPC9X
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Details
Other names
568-1280-5
935273787512
P89LPC921FDH
P89LPC921FDH,529
P89LPC921FDH-S
935273787512
P89LPC921FDH
P89LPC921FDH,529
P89LPC921FDH-S
Philips Semiconductors
9397 750 14469
Product data
8.19 I
I
connected to the bus, and it has the following features:
A typical I
device provides a byte-oriented I
400 kHz.
2
2
•
•
•
•
•
•
Fig 8. I
C-bus uses two wires (SDA and SCL) to transfer information between devices
C-bus serial interface
Bidirectional data transfer between masters and slaves
Multimaster bus (no central master)
Arbitration between simultaneously transmitting masters without corruption of
serial data on the bus
Serial clock synchronization allows devices with different bit rates to communicate
via one serial bus
Serial clock synchronization can be used as a handshake mechanism to suspend
and resume serial transfer
The I
2
C-bus may be used for test and diagnostic purposes.
2
2
C-bus configuration.
C-bus configuration is shown in
I
2
C-BUS
Rev. 08 — 15 December 2004
P1.3/SDA
P89LPC920/921/922
P1.2/SCL
P89LPC920/921/922/9221
2
8-bit microcontrollers with two-clock 80C51 core
C-bus interface that supports data transfers up to
OTHER DEVICE
WITH I
R P
INTERFACE
Figure
2
C-BUS
R P
8. The P89LPC920/921/922/9221
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
OTHER DEVICE
WITH I
INTERFACE
2
C-BUS
002aaa420
SDA
SCL
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