EP9301-CQZ Cirrus Logic Inc, EP9301-CQZ Datasheet - Page 23

• Manufacturer Part Number: EP9301-CQZ
• Description: IC ARM9 SOC PROCESSOR 208LQFP
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9301-CQZ

• Core Size: 16/32-Bit
• Peripherals: AC'97, DMA, I&sup2:S, LED, MaverickKey, POR, PWM, WDT
• Core Processor: ARM9
• Speed: 166MHz
• Connectivity: EBI/EMI, Ethernet, I²C, IrDA, SPI, UART/USART, USB
• Number Of I /o: 19
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 5x12b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 208-TQFP, 208-VQFP
• Controller Family/series: (ARM9)
• No. Of I/o's: 19
• Ram Memory Size: 16MB
• Cpu Speed: 166MHz
• No. Of Timers: 4
• Digital Ic Case Style: TQFP
• Embedded Interface Type: SPI
• Rohs Compliant: Yes
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 598-1136

Static Memory Burst Write Cycle
DS636F2
AD setup to WRn assert time
AD hold from WRn deassert time
WRN/DQMn deassert to AD transition time
CSn hold from WRn deassert time
CSn to WRn assert delay time
CSn to DQMn assert delay time
DQMn assert time
DQMn deassert time
WRn assert time
WRn deassert time
WRn/DQMn deassert to DA transition time
WRn/DQMn assert to DA valid time
DQMn
WAIT
WRn
CSn
AD
RD
DA
Note:
t
DQMd
t
These characteristics are valid when the Page Mode Enable (Burst Mode) bit is set. See the User's Guide for details.
WRd
t
ADs
Parameter
t
DAv
t
t
DQpwL
WRpwL
Figure 11. Static Memory Burst Write Cycle Timing Measurement
t
t
t
ADd
WRpwH
DQpwH

Copyright 2010 Cirrus Logic (All Rights Reserved)
t
DAh
Symbol
t
t
t
t
t
WRpwH
DQpwH
WRpwL
DQpwL
t
DQMd
t
t
t
t
t
t
WRd
ADs
ADh
ADd
CSh
DAh
DAv
t
t
HCLK
HCLK
t
Min
HCLK
7
− 3
× 2
Entry Level ARM9 System-on-Chip Processor
t
t
HCLK
HCLK
× (WST1 + 11)
× (WST1 + 1)
Typ
(t
(t
HCLK
HCLK
t
HCLK
Max
× 2) + 14
2
1
8
× 2) + 7
+ 6
t
ADh
t
EP9301
CSh
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
23