C8051T631-GM Silicon Laboratories Inc, C8051T631-GM Datasheet - Page 89
C8051T631-GM
Manufacturer Part Number
C8051T631-GM
Description
IC MCU 8KB 20PIN QFN
Manufacturer
Silicon Laboratories Inc
Series
C8051T63xr
Specifications of C8051T631-GM
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
17
Program Memory Size
8KB (8K x 8)
Program Memory Type
OTP
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-QFN
Processor Series
C8051T6x
Core
8051
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
UART, SPI, SMBus
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
17
Number Of Timers
4 x 16-bit
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051T630DK
Minimum Operating Temperature
- 40 C
For Use With
336-1464 - KIT DEV FOR C8051T630 FAMILY
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Details
Other names
336-1459-5
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C8051T630/1/2/3/4/5
16. EPROM Memory
Electrically programmable read-only memory (EPROM) is included on-chip for program code storage. The
EPROM memory can be programmed via the C2 debug and programming interface when a special pro-
gramming voltage is applied to the V
pin. Each location in EPROM memory is programmable only once
PP
(i.e., non-erasable). Table 5.6 on page 26 shows the EPROM specifications.
16.1. Programming and Reading the EPROM Memory
Reading and writing the EPROM memory is accomplished through the C2 programming and debug inter-
face. When creating hardware to program the EPROM, it is necessary to follow the programming steps
listed below. Refer to the “C2 Interface Specification” available at http://www.silabs.com for details on com-
municating via the C2 interface. Section “26. C2 Interface” on page 210 has information about C2 register
addresses for the C8051T630/1/2/3/4/5.
16.1.1. EPROM Write Procedure
1. Reset the device using the RST pin.
2. Wait at least 20 µs before sending the first C2 command.
3. Place the device in core reset: Write 0x04 to the DEVCTL register.
4. Set the device to program mode (1st step): Write 0x40 to the EPCTL register.
5. Set the device to program mode (2nd step): Write 0x58 to the EPCTL register.
6. Apply the VPP programming Voltage.
7. Write the first EPROM address for programming to EPADDRH and EPADDRL.
8. Write a data byte to EPDAT. EPADDRH:L will increment by 1 after this write.
9. Use a C2 Address Read command to poll for write completion.
10.(Optional) Check the ERROR bit in register EPSTAT and abort the programming operation if necessary.
11. If programming is not finished, return to Step 8 to write the next address in sequence, or return to
Step 7 to program a new address.
12.Remove the VPP programming Voltage
13.Remove program mode (1st step): Write 0x40 to the EPCTL register.
14.Remove program mode (2nd step): Write 0x00 to the EPCTL register.
15.Reset the device: Write 0x02 and then 0x00 to the DEVCTL register.
Important Note: There is a finite amount of time which V
can be applied without damaging the device,
PP
which is cumulative over the life of the device. Refer to Table 5.1 on page 23 for the V
timing specifica-
PP
tion.
Rev. 1.0
89
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