C8051F339-GM Silicon Laboratories Inc, C8051F339-GM Datasheet - Page 30

• Manufacturer Part Number: C8051F339-GM
• Description: IC MCU 16K FLASH 24QFN
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F33xr

Specifications of C8051F339-GM

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 24-QFN
• Processor Series: C8051F3x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 21
• Number Of Timers: 4
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: KSK-SL-TOOLSTICK, PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F336DK
• Minimum Operating Temperature: - 40 C
• Package: 24QFN EP
• Device Core: 8051
• Family Name: C8051F33x
• Maximum Speed: 25 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details
• Other names: 336-1426-5

C8051F336/7/8/9
Table 6.4. Reset Electrical Characteristics
–40 to +85 °C unless otherwise specified.
Table 6.5. Flash Electrical Characteristics
V
30
Parameter
RST Output Low Voltage
RST Input Low Voltage
RST Input Pullup Current
V
Missing Clock Detector Time-
out
Reset Time Delay
Minimum RST Low Time to
Generate a System Reset
V
V
Parameter
Flash Size
Endurance
Erase Cycle Time
Write Cycle Time
Note: 512 bytes at addresses 0x3E00 to 0x3FFF are reserved.
DD
DD
DD
DD
= 2.7 to 3.6 V;
POR Threshold (V
Monitor Turn-on Time
Monitor Supply Current
–
40 to +85 ºC unless otherwise specified.
RST
Conditions
25 MHz System Clock
25 MHz System Clock
)
Conditions
I
V
RST = 0.0 V
Time from last system clock
rising edge to reset initiation
Delay between release of any
reset source and code
execution at location 0x0000
OL
DD
= 8.5 mA,
= 2.7 V to 3.6 V
Rev.1.0
16384*
20 k
Min
10
40
2.40
Min
100
100
15
—
—
—
—
—
100 k
Typ
15
55
—
2.55
Typ
220
50
20
—
—
—
—
—
Max
20
70
—
—
Max
2.70
100
600
0.6
0.6
40
40
—
—
Erase/Write
Units
bytes
ms
µs
Units
µA
µA
µs
µs
µs
µs
V
V