C8051F553-IM Silicon Laboratories Inc, C8051F553-IM Datasheet - Page 4
![IC 8051 MCU 32K FLASH 24-QFN](/photos/12/15/121587/c8051f9xx_24-qfn_sml.jpg)
C8051F553-IM
Manufacturer Part Number
C8051F553-IM
Description
IC 8051 MCU 32K FLASH 24-QFN
Manufacturer
Silicon Laboratories Inc
Series
C8051F55xr
Specifications of C8051F553-IM
Program Memory Type
FLASH
Program Memory Size
32KB (32K x 8)
Package / Case
24-QFN
Core Processor
8051
Core Size
8-Bit
Speed
50MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
18
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.25 V
Data Converters
A/D 18x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Processor Series
C8051F5x
Core
8051
Data Bus Width
8 bit
Data Ram Size
2304 B
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
18
Operating Supply Voltage
1.8 V to 5.25 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F540DK
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-1691 - KIT DEVELOPMENT FOR C8051F560
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1686-5
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C8051F55x/56x/57x
13. Interrupts .............................................................................................................. 112
14. Flash Memory....................................................................................................... 124
15. Power Management Modes................................................................................. 133
16. Reset Sources ...................................................................................................... 136
17. External Data Memory Interface and On-Chip XRAM ....................................... 142
4
12.2. Interrupts and SFR Paging .............................................................................. 95
12.3. SFR Page Stack Example ............................................................................... 97
13.1. MCU Interrupt Sources and Vectors.............................................................. 112
13.2. Interrupt Register Descriptions ...................................................................... 115
13.3. External Interrupts INT0 and INT1................................................................. 122
14.1. Programming The Flash Memory .................................................................. 124
14.2. Non-volatile Data Storage ............................................................................. 126
14.3. Security Options ............................................................................................ 126
14.4. Flash Write and Erase Guidelines ................................................................. 128
15.1. Idle Mode....................................................................................................... 133
15.2. Stop Mode ..................................................................................................... 134
15.3. Suspend Mode .............................................................................................. 134
16.1. Power-On Reset ............................................................................................ 137
16.2. Power-Fail Reset/VDD Monitor ..................................................................... 137
16.3. External Reset ............................................................................................... 139
16.4. Missing Clock Detector Reset ....................................................................... 139
16.5. Comparator0 Reset ....................................................................................... 140
16.6. PCA Watchdog Timer Reset ......................................................................... 140
16.7. Flash Error Reset .......................................................................................... 140
16.8. Software Reset .............................................................................................. 140
17.1. Accessing XRAM........................................................................................... 142
17.2. Configuring the External Memory Interface ................................................... 143
17.3. Port Configuration.......................................................................................... 143
17.4. Multiplexed Mode .......................................................................................... 147
17.5. Memory Mode Selection................................................................................ 148
13.1.1. Interrupt Priorities.................................................................................. 113
13.1.2. Interrupt Latency ................................................................................... 113
14.1.1. Flash Lock and Key Functions .............................................................. 124
14.1.2. Flash Erase Procedure ......................................................................... 124
14.1.3. Flash Write Procedure .......................................................................... 125
14.1.4. Flash Write Optimization ....................................................................... 125
14.4.1. V
14.4.2. PSWE Maintenance .............................................................................. 128
14.4.3. System Clock ........................................................................................ 129
17.1.1. 16-Bit MOVX Example .......................................................................... 142
17.1.2. 8-Bit MOVX Example ............................................................................ 142
17.5.1. Internal XRAM Only .............................................................................. 148
17.5.2. Split Mode without Bank Select............................................................. 148
17.5.3. Split Mode with Bank Select.................................................................. 149
17.5.4. External Only......................................................................................... 149
DD
Maintenance and the V
Rev. 1.1
DD
monitor ................................................ 128
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