C8051F563-IM Silicon Laboratories Inc, C8051F563-IM Datasheet - Page 172
![IC 8051 MCU 32K FLASH 32-QFN](/photos/12/26/122657/c8051f563-im_sml.jpg)
C8051F563-IM
Manufacturer Part Number
C8051F563-IM
Description
IC 8051 MCU 32K FLASH 32-QFN
Manufacturer
Silicon Laboratories Inc
Series
C8051F56xr
Specifications of C8051F563-IM
Program Memory Type
FLASH
Program Memory Size
32KB (32K x 8)
Package / Case
32-QFN
Core Processor
8051
Core Size
8-Bit
Speed
50MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
25
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.25 V
Data Converters
A/D 25x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Processor Series
C8051F5x
Core
8051
Data Bus Width
8 bit
Data Ram Size
2304 B
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
25
Operating Supply Voltage
1.8 V to 5.25 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F560DK
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-1691 - KIT DEVELOPMENT FOR C8051F560
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1699-5
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F563-IM
Manufacturer:
Silicon Labs
Quantity:
135
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C8051F55x/56x/57x
19.4. Port I/O Initialization
Port I/O initialization consists of the following steps:
1. Select the input mode (analog or digital) for all Port pins, using the Port Input Mode register (PnMDIN).
2. Select the output mode (open-drain or push-pull) for all Port pins, using the Port Output Mode register
3. Select any pins to be skipped by the I/O Crossbar using the Port Skip registers (PnSKIP).
4. Assign Port pins to desired peripherals.
5. Enable the Crossbar (XBARE = 1).
All Port pins must be configured as either analog or digital inputs. Port 4 C8051F568-9 and ‘F570-5 is a
digital-only Port. Any pins to be used as Comparator or ADC inputs should be configured as an analog
inputs. When a pin is configured as an analog input, its weak pullup, digital driver, and digital receiver are
disabled. This process saves power and reduces noise on the analog input. Pins configured as digital
inputs may still be used by analog peripherals; however this practice is not recommended.
Additionally, all analog input pins should be configured to be skipped by the Crossbar (accomplished by
setting the associated bits in PnSKIP). Port input mode is set in the PnMDIN register, where a 1 indicates a
digital input, and a 0 indicates an analog input. All pins default to digital inputs on reset. See SFR Definition
19.13 for the PnMDIN register details.
172
P o r t
S p e c i a l
F u n c t i o n
S i g n a l s
P I N I / O
U A R T _ T X
U A R T _ R X
C A N _ T X
C A N _ R X
S C K
M I S O
M O S I
N S S
S D A
S C L
C P 0
C P 0 A
C P 1
C P 1 A
S Y S C L K
C E X 0
C E X 1
C E X 2
C E X 3
C E X 4
C E X 5
E C I
T 0
T 1
L I N _ T X
L I N _ R X
(PnMDOUT).
0
0
1
1
Figure 19.4. Crossbar Priority Decoder in Example Configuration
P 0 S K I P [0 :7 ]
2
1
3
0
P 0
4
0
5
1
6
0
7
0
0
0
1
0
* N S S Is o n l y p i n n e d o u t i n 4 -w i r e S P I M o d e
P 1 S K I P [ 0 :7 ]
2
0
3
0
P 1
4
0
5
0
Rev. 1.1
6
0
7
0
0
0
1
0
P 2 S K I P [ 0 : 7 ]
a n d 3 2 - p i n p a c k a g e s
2
0
a va i l a b l e o n 4 0 - p i n
P 2 . 2 - P 2 . 7 , P 3 . 0
3
0
P 2
4
0
5
0
6
0
7
0
0
0
1
0
P 3 S K I P [ 0 : 7 ]
a va i l a b l e o n 4 0 - p i n
2
0
P 3 . 1 - P 3 . 7 , P 4 . 0
3
0
p a c k a g e s
P 3
4
0
5
0
6
0
7
0
P 4
0
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