C8051F714-GM Silicon Laboratories Inc, C8051F714-GM Datasheet - Page 201

• Manufacturer Part Number: C8051F714-GM
• Description: IC 8051 MCU 8K FLASH 48-QFN
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F71xr

Specifications of C8051F714-GM

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Cap Sense, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 39
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-QFN
• Processor Series: C8051F7x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: I2C, SMBus, SPI, UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 39
• Number Of Timers: 4
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F700DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• For Use With: 336-1635 - DEV KIT FOR C8051F700
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 336-1616-5

SFR Definition 28.19. P2MDOUT: Port 2 Output Mode
SFR Address = 0xA6; SFR Page = F
SFR Definition 28.20. P2SKIP: Port 2 Skip
SFR Address = 0xD6; SFR Page = F
Name
Reset
Name
Reset
Bit
7:0 P2MDOUT[7:0] Output Configuration Bits for P2.7–P2.0 (respectively).
Bit
7:0
Type
Type
Bit
Bit
P2SKIP[3:0]
Name
Name
7
0
7
0
These bits are ignored if the corresponding bit in register P2MDIN is logic 0.
0: Corresponding P2.n Output is open-drain.
1: Corresponding P2.n Output is push-pull.
Port 2 Crossbar Skip Enable Bits.
These bits select Port 2 pins to be skipped by the Crossbar Decoder. Port pins
used for analog, special functions or GPIO should be skipped by the Crossbar.
0: Corresponding P2.n pin is not skipped by the Crossbar.
1: Corresponding P2.n pin is skipped by the Crossbar.
6
6
0
0
5
0
5
0
Rev. 1.0
P2MDOUT[7:0]
4
0
4
0
P2SKIP[7:0]
R/W
R/W
Function
Function
3
0
3
0
C8051F70x/71x
2
0
2
0
1
0
1
0
0
0
0
0
201