C8051F714-GM Silicon Laboratories Inc, C8051F714-GM Datasheet - Page 28

• Manufacturer Part Number: C8051F714-GM
• Description: IC 8051 MCU 8K FLASH 48-QFN
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F71xr

Specifications of C8051F714-GM

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Cap Sense, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 39
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-QFN
• Processor Series: C8051F7x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: I2C, SMBus, SPI, UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 39
• Number Of Timers: 4
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F700DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• For Use With: 336-1635 - DEV KIT FOR C8051F700
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 336-1616-5

C8051F70x/71x
3. Pin Definitions
28
XTAL1
XTAL2
AGND
Name TQFP64 TQFP48
C2CK
VREF
RST /
P0.0 /
P0.2 /
P0.3 /
P0.1/
GND
P0.4
P0.5
P0.6
C2D
V
DD
41, 57
40, 56
8, 24,
9, 25,
58
59
55
54
53
52
51
50
49
8, 20, 44
QFN48
30, 43
9, 21,
45
46
42
41
40
39
38
37
36
Table 3.1. Pin Definitions for the C8051F70x/71x
QFN32 QFN24
Center
27
28
29
26
25
24
—
—
—
—
21
20
22
23
—
—
—
—
19
18
—
D I/O or
D I/O or
D I/O or
D I/O or
D I/O or
D I/O or
D I/O or
A I/O or
Rev. 1.0
D I/O
D I/O
D I/O
Type
A In
A In
A In
A In
A In
A In
D In
A In
A In
A In
Power Supply Voltage.
Ground.
Device Reset. Open-drain output of internal
POR or V
Clock signal for the C2 Debug Interface.
Bi-directional data signal for the C2 Debug
Interface.
Port 0.0.
ADC0 Input.
External VREF input.
Port 0.1.
ADC0 Input.
External AGND input.
Port 0.2.
ADC0 Input.
External Clock Pin. This pin can be used for
crystal clock mode.
Port 0.3.
ADC0 Input.
External Clock Pin. This pin can be used for
RC, crystal, and CMOS clock modes.
Port 0.4.
ADC0 Input.
Port 0.5.
ADC0 Input.
Port 0.6.
ADC0 Input.
DD
monitor.
Description