C8051F505-IM Silicon Laboratories Inc, C8051F505-IM Datasheet - Page 76
![IC 8051 MCU 32K FLASH 48-QFN](/photos/12/27/122700/c8051f505-im_sml.jpg)
C8051F505-IM
Manufacturer Part Number
C8051F505-IM
Description
IC 8051 MCU 32K FLASH 48-QFN
Manufacturer
Silicon Laboratories Inc
Series
C8051F50xr
Specifications of C8051F505-IM
Program Memory Type
FLASH
Program Memory Size
32KB (32K x 8)
Package / Case
48-QFN
Mfg Application Notes
LIN Bootloader AppNote
Core Processor
8051
Core Size
8-Bit
Speed
50MHz
Connectivity
EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
40
Ram Size
4.25K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.25 V
Data Converters
A/D 32x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Processor Series
C8051F5x
Core
8051
Data Bus Width
8 bit
Data Ram Size
4.25 KB
Interface Type
I2C/SPI/UART
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
40
Number Of Timers
4
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F500DK
Minimum Operating Temperature
- 40 C
On-chip Adc
32-ch x 12-bit
A/d Bit Size
12 bit
A/d Channels Available
32
Height
0.88 mm
Length
7 mm
Supply Voltage (max)
5.25 V
Supply Voltage (min)
1.8 V
Width
7 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-1527 - KIT DEV FOR C8051F50X
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1521-5
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F505-IM
Manufacturer:
Silicon Labs
Quantity:
135
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C8051F50x/F51x
Comparator outputs can be polled in software, used as an interrupt source, and/or routed to a Port pin.
When routed to a Port pin, Comparator outputs are available asynchronous or synchronous to the system
clock; the asynchronous output is available even in STOP mode (with no system clock active). When dis-
abled, the Comparator output (if assigned to a Port I/O pin via the Crossbar) defaults to the logic low state,
and the power supply to the comparator is turned off. See Section “20.3. Priority Crossbar Decoder” on
page 180 for details on configuring Comparator outputs via the digital Crossbar. Comparator inputs can be
externally driven from –0.25 V to (V
trical specifications are given in Table 5.12.
The Comparator response time may be configured in software via the CPTnMD registers (see SFR Defini-
tion 9.2). Selecting a longer response time reduces the Comparator supply current. See Table 5.12 on
page 51 for complete timing and supply current requirements.
Comparator hysteresis is software-programmable via its Comparator Control register CPTnCN.
The amount of negative hysteresis voltage is determined by the settings of the CPnHYN bits. As shown in
Figure 9.2, various levels of negative hysteresis can be programmed, or negative hysteresis can be dis-
abled. In a similar way, the amount of positive hysteresis is determined by the setting the CPnHYP bits.
Comparator interrupts can be generated on both rising-edge and falling-edge output transitions. (For Inter-
rupt enable and priority control, see “14. Interrupts” on page 117.) The CPnFIF flag is set to 1 upon a Com-
parator falling-edge, and the CPnRIF flag is set to 1 upon the Comparator rising-edge. Once set, these bits
remain set until cleared by software. The output state of the Comparator can be obtained at any time by
reading the CPnOUT bit. The Comparator is enabled by setting the CPnEN bit to 1, and is disabled by
clearing this bit to 0.
76
(Programmed with CPnHYP Bits)
Positive Hysteresis Voltage
INPUTS
OUTPUT
VIN+
VIN-
CIRCUIT CONFIGURATION
Positive Hysteresis
CPn-
VIN+
CPn+
VIN-
V
Disabled
OL
Figure 9.2. Comparator Hysteresis Plot
V
OH
+
_
CPn
DD
) + 0.25 V without damage or upset. The complete Comparator elec-
Positive Hysteresis
Maximum
OUT
Rev. 1.2
Negative Hysteresis
Disabled
Negative Hysteresis
(Programmed by CPnHYN Bits)
Maximum
Negative Hysteresis Voltage
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